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參數(shù)資料
| 型號： | 74F525SC |
| 英文描述： | Analog Timer Circuit |
| 中文描述： | 模擬定時器電路 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 79K |
| 代理商： | 74F525SC |
www.fairchildsemi.com
2
7
Unit Loading/Fan Out
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Note 1:
A
0
=
B
0
, A
1
=
B
1
, A
2
=
B
2
, etc.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names
Description
U.L.
Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
A
0
–
A
7
B
0
–
B
7
I
A
=
B
O
A
=
B
Word A Inputs
1.0/1.0
20
μ
A/
0.6 mA
Word B Inputs
1.0/1.0
20
μ
A/
0.6 mA
Expansion or Enable Input (Active LOW)
1.0/1.0
20
μ
A/
0.6 mA
Identity Output (Active LOW)
50/33.3
1 mA/20 mA
Inputs
Output
I
A
=
B
A, B
O
A
=
B
L
A
=
B (Note 1)
L
L
A
≠
B
H
H
A
=
B (Note 1)
H
H
A
≠
B
H
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