參數(shù)資料
型號: 74F385
廠商: NXP Semiconductors N.V.
英文描述: Quad serial adder/subtractor
中文描述: 四串行加法器/減法
文件頁數(shù): 5/6頁
文件大小: 64K
代理商: 74F385
Philips Semiconductors
Product specification
74F385
Quad serial adder/subtractor
1989 Sep 20
5
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
amb
= +25
°
C
V
CC
= +5.0V
C
L
= 50pF, R
L
= 500
MIN
TYP
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500
MIN
SYMBOL
PARAMETER
TEST
UNIT
CONDITION
MAX
MAX
f
MAX
t
PLH
t
PHL
t
PLH
Maximum clock frequency
Waveform 1
105
140
90
MHz
Propagation delay,
Cn to Fn
Waveform 1
3.0
3.5
5.0
5.5
8.0
9.0
2.5
3.5
9.0
10.0
ns
Propagation delay, MR to Fn
Waveform 2
4.0
6.5
9.5
4.0
10.5
ns
AC SETUP REQUIREMENTS
LIMITS
T
amb
= +25
°
C
V
CC
= +5.0V
C
L
= 50pF, R
L
= 500
MIN
TYP
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500
MIN
SYMBOL
PARAMETER
TEST
UNIT
CONDITION
MAX
MAX
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
Setup time, High or Low
An, Bn or Sn to CP
Waveform 3
12.0
12.0
12.0
12.0
ns
Hold time, High or Low
An, Bn or Sn to CP
Waveform 3
0
0
0
0
ns
CP Pulse width
High or Low
Waveform 2
6.0
6.0
6.0
6.0
ns
t
w
(L)
MR Pulse width
Low
Waveform 2
6.0
6.0
ns
t
REC
(L)
Recovery time
MR to CP
Waveform 2
8.5
9.5
ns
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performances.
CP
V
M
V
M
V
M
t
w
(H)
1/f
max
V
M
V
M
t
PLH
t
w
(L)
t
PHL
Fn
SF00932
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
V
M
V
M
V
M
V
M
Fn
MR
t
PHL
t
REC
SF00933
CP
t
W
(L)
Waveform 2. Master Reset Pulse Width,
Master Reset to Output Delay and
Master Reset to Clock Recovery Time
V
M
V
M
V
M
V
M
V
M
V
M
t
s
(L)
t
h
(L)
t
s
(H)
t
h
(H)
An, Bn, Sn
CP
SF00934
Waveform 3. Data and Select Setup and Hold Times
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