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參數(shù)資料
| 型號(hào)： | 74F258APC |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quad 2-Input Multiplexer with TRI-STATE Outputs |
| 中文描述： | F/FAST SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-16 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 159K |
| 代理商： | 74F258APC |
Unit Loading/Fan Out
54F/74F
Pin Names
Description
U.L.
Input I
IH
/I
IL
Output I
OH
/I
OL
HIGH/LOW
S
OE
I
0a
–I
0d
I
1a
–I
1d
Z
a
–Z
d
Common Data Select Input
TRI-STATE Output Enable Input (Active LOW)
Data Inputs from Source 0
Data Inputs from Source 1
TRI-STATE Inverting Data Outputs
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
150/40 (33.3)
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
b
3 mA/24 mA (20 mA)
Functional Description
The ’F258A is a quad 2-input multiplexer with TRI-STATE
outputs. It selects four bits of data from two sources under
control of a common Select input (S). When the Select input
is LOW, the I
0x
inputs are selected and when Select is
HIGH, the I
1x
inputs are selected. The data on the selected
inputs appears at the outputs in inverted form. The ’F258A
is the logic implementation of a 4-pole, 2-position switch
where the position of the switch is determined by the logic
levels supplied to the Select input. The logic equation for
the outputs is shown below:
Z
n
e
OE
#
(I
1n
#
S
a
I
0n
#
S)
When the Output Enable input (OE) is HIGH, the outputs are
forced to a high impedance OFF state. If the outputs of the
TRI-STATE devices are tied together, all but one device
must be in the high impedance state to avoid high currents
that would exceed the maximum ratings. Designers should
ensure that Output Enable signals to TRI-STATE devices
whose outputs are tied together are designed so there is no
overlap.
Truth Table
Output
Enable
Select
Input
Data
Inputs
Output
OE
S
I
0
I
1
Z
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Z
e
High Impedance
H
L
L
L
L
X
H
H
L
L
X
X
X
L
H
X
L
H
X
X
Z
H
L
H
L
Logic Diagram
TL/F/9508–4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
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PDF描述 |
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| 74F258ASJ | Quad 2-Input Multiplexer with TRI-STATE Outputs |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F258APC WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74F258ASC | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 Qd 2-Inp Multiplexer RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| 74F258ASCX | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 Qd 2-Inp Multiplexer RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| 74F258ASJ | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 Qd 2-Inp Multiplexer RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| 74F258ASJX | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
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