參數(shù)資料
型號(hào): 74F258A
廠商: National Semiconductor Corporation
英文描述: Quad 2-Input Multiplexer with TRI-STATE Outputs(帶三態(tài)輸出的四2輸入多路復(fù)用器)
中文描述: 四2輸入多路復(fù)用器與三態(tài)輸出(帶三態(tài)輸出的四2輸入多路復(fù)用器)
文件頁數(shù): 2/8頁
文件大?。?/td> 159K
代理商: 74F258A
Unit Loading/Fan Out
54F/74F
Pin Names
Description
U.L.
Input I
IH
/I
IL
Output I
OH
/I
OL
HIGH/LOW
S
OE
I
0a
–I
0d
I
1a
–I
1d
Z
a
–Z
d
Common Data Select Input
TRI-STATE Output Enable Input (Active LOW)
Data Inputs from Source 0
Data Inputs from Source 1
TRI-STATE Inverting Data Outputs
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
150/40 (33.3)
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
b
3 mA/24 mA (20 mA)
Functional Description
The ’F258A is a quad 2-input multiplexer with TRI-STATE
outputs. It selects four bits of data from two sources under
control of a common Select input (S). When the Select input
is LOW, the I
0x
inputs are selected and when Select is
HIGH, the I
1x
inputs are selected. The data on the selected
inputs appears at the outputs in inverted form. The ’F258A
is the logic implementation of a 4-pole, 2-position switch
where the position of the switch is determined by the logic
levels supplied to the Select input. The logic equation for
the outputs is shown below:
Z
n
e
OE
#
(I
1n
#
S
a
I
0n
#
S)
When the Output Enable input (OE) is HIGH, the outputs are
forced to a high impedance OFF state. If the outputs of the
TRI-STATE devices are tied together, all but one device
must be in the high impedance state to avoid high currents
that would exceed the maximum ratings. Designers should
ensure that Output Enable signals to TRI-STATE devices
whose outputs are tied together are designed so there is no
overlap.
Truth Table
Output
Enable
Select
Input
Data
Inputs
Output
OE
S
I
0
I
1
Z
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Z
e
High Impedance
H
L
L
L
L
X
H
H
L
L
X
X
X
L
H
X
L
H
X
X
Z
H
L
H
L
Logic Diagram
TL/F/9508–4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
相關(guān)PDF資料
PDF描述
74F258APC Quad 2-Input Multiplexer with TRI-STATE Outputs
74F258ASC Schottky Rectifier; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes RoHS Compliant: Yes
74F258ASJ Quad 2-Input Multiplexer with TRI-STATE Outputs
74F2620PCQR Inverting Octal Bus Transceiver with 25ヘ Series Resistors in the Output
74F2623PCQR Inverting Octal Bus Transceiver with 25ヘ Series Resistors in the Output
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