參數(shù)資料
型號: 74F251
廠商: Fairchild Semiconductor Corporation
英文描述: 8-Input Multiplexer with 3-STATE Outputs
中文描述: 8 - 3輸入復(fù)用器態(tài)輸出
文件頁數(shù): 2/8頁
文件大小: 165K
代理商: 74F251
Unit Loading/Fan Out
54F/74F
Pin Names
Description
U.L.
Input I
IH
/I
IL
Output I
OH
/I
OL
HIGH/LOW
S
0
–S
2
OE
I
0
–I
7
Z
Z
Select Inputs
TRI-STATE Output Enable Input (Active LOW)
Multiplexer Inputs
TRI-STATE Multiplexer Output
Complementary TRI-STATE Multiplexer Output
1.0/1.0
1.0/1.0
1.0/1.0
150/40 (33.3)
150/40 (33.3)
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
20
m
A/
b
0.6 mA
b
3 mA/24 mA (20 mA)
b
3 mA/24 mA (20 mA)
Functional Description
This device is a logical implementation of a single-pole, 8-
position switch with the switch position controlled by the
state of three Select inputs, S
0
, S
1
, S
2
. Both assertion and
negation outputs are provided. The Output Enable input
(OE) is active LOW. When it is activated, the logic function
provided at the output is:
Z
e
OE
#
(I
0
#
S
0
#
S
1
#
S
2
a
I
1
#
S
0
#
S
1
#
S
2
a
I
2
#
S
0
#
S
1
#
S
2
a
I
3
#
S
0
#
S
1
#
S
2
a
I
4
#
S
0
#
S
1
#
S
2
a
I
5
#
S
0
#
S
1
#
S
2
a
I
6
#
S
0
#
S
1
#
S
2
a
I
7
#
S
0
#
S
1
#
S
2
)
When the Output Enable is HIGH, both outputs are in the
high impedance (High Z) state. This feature allows multi-
plexer expansion by tying the outputs of up to 128 devices
together. When the outputs of the TRI-STATE devices are
tied together, all but one device must be in the high imped-
ance state to avoid high currents that would exceed the
maximum ratings. The Output Enable signals should be de-
signed to ensure there is no overlap in the active LOW por-
tion of the enable voltages.
Truth Table
Inputs
Outputs
OE
S
2
S
1
S
0
Z
Z
H
L
L
L
X
L
L
L
X
L
L
H
X
L
H
L
Z
I
0
I
1
I
2
Z
I
0
I
1
I
2
L
L
L
L
L
L
H
H
H
H
H
L
L
H
H
H
L
H
L
H
I
3
I
4
I
5
I
6
I
7
I
3
I
4
I
5
I
6
I
7
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Z
e
High Impedance
Logic Diagram
TL/F/9504–4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
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