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參數(shù)資料
| 型號： | 74F109 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Dual JK Positive Edge-Triggered Flip-Flop(雙通道正向邊沿觸發(fā)的J-K觸發(fā)器) |
| 中文描述： | 雙JK上升沿觸發(fā)器（雙通道正向邊沿觸發(fā)的JK觸發(fā)器） |
| 文件頁數(shù)： | 2/10頁 |
| 文件大?。?/td> | 133K |
| 代理商： | 74F109 |
Connection Diagrams
Unit Loading/Fan Out
See Section 0 for U.L. definitions
54F/74F
Pin Names
Description
U.L.
Input I
IH
/I
IL
Output I
OH
/I
OL
20 μA/0.6 mA
20 μA/0.6 mA
20 μA/1.8 mA
20 μA/1.8 mA
1 mA/20 mA
HIGH/LOW
1.0/1.0
1.0/1.0
1.0/3.0
1.0/3.0
50/33.3
J
1
, J
2
, K
1
, K
2
CP
1
, CP
2
C
D1
, C
D2
S
D1
, S
D2
Q
1
, Q
2
, Q
1
, Q
2
Data Inputs
Clock Pulse Inputs (Active Rising Edge)
Direct Clear Inputs (Active LOW)
Direct Set Inputs (Active LOW)
Outputs
Truth Table
Inputs
CP
Outputs
Q
H
L
H
L
Toggle
Q
0
H
Q
0
S
D
L
H
L
H
H
H
H
H
C
D
H
L
L
H
H
H
H
H
J
X
X
X
l
h
l
h
X
K
X
X
X
l
l
h
h
X
Q
L
H
H
H
X
X
X
N
N
N
Q
0
L
Q
0
N
L
H (h) = HIGH Voltage Level
L (l) = LOW Voltage Level
N
= LOW-to-HIGH Transition
X = Immaterial
Q
(Q
) = Before LOW-to-HIGH Transition of Clock
Lower case letters indicate the state of the referenced output one setup time prior to the LOW-to-HIGH clock transition.
Pin Assignment
for DIP, SOIC and Flatpak
DS009471-1
Pin Assignment
for LCC
DS009471-2
PrintDate=1997/08/28 PrintTime=11:45:23 10182 ds009471 Rev. No. 1
cmserv
Proof
2
DSXXX
www.national.com
2
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74F109_00 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Dual JK Positive Edge-Triggered Flip-Flop |
| 74F109_XGH3026B WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74F109D | 制造商:North American Philips Discrete Products Div 功能描述:Flip Flop, Dual, J/K Type, 16 Pin, Plastic, SOP 制造商:NXP Semiconductors 功能描述:Flip Flop, Dual, J/K Type, 16 Pin, Plastic, SOP |
| 74F109DC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 74F109LC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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