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參數(shù)資料
| 型號： | 74AS160 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | SYNCHRONOUS 4-BIT DECADE AND BINARY COUNTERS |
| 中文描述： | 同步4位二進(jìn)制計(jì)數(shù)器十年 |
| 文件頁數(shù)： | 10/11頁 |
| 文件大?。?/td> | 160K |
| 代理商： | 74AS160 |
SN54ALS160B THRU SN54ALS163B, SN54AS160 THRU SN54AS163
SN74ALS160B THRU SN74ALS163B, SN74AS160 THRU SN74AS163
SYNCHRONOUS 4-BIT DECADE COUNTERS
SDAS024A – D2661, APRIL 1982 – REVISED MAY 1986
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
10
APPLICATION INFORMATION
N–bit synchronous counters
This application demonstrates how the ripple mode carry circuit (Figure 1) and the carry-look-ahead circuit
(Figure 2) can be used to implement a high-speed N-bit counter. The ’ALS160B, ’AS160, ’ALS162B, and ’AS162
will count in BCD and the ’ALS161B, ’AS161, ’ALS163B, and ’AS163 will count in binary. When additional stages
are added, the f
MAX
decreases in Figure 1 , but remains unchanged in Figure 2.
fMAX = 1/(CLK to RCO tPLH) + (ENP tsu)
fMAX = 1/(CLK to RCO tPLH) + (ENT to RCO tPLH) (N–2) + (ENT tsu)
CLOCK
CLEAR (L)
COUNT (H)
DISABLE (L)
LOAD (L)
LOAD
ENT
ENP
CLK
CLR
A
B
C
D
CTR
3CT=MAX
QA
QB
QC
QD
CT=0
M1
G3
G4
C5/T,3,4+
1,5D
LSB
D
1,5D
C5/T,3,4+
G4
G3
M1
CT=0
QD
QC
QB
QA
3CT=MAX
CTR
C
B
A
CLK
ENP
ENT
CLR
LOAD
D
1,5D
C5/T,3,4+
G4
G3
M1
CT=0
QD
QC
QB
QA
3CT=MAX
CTR
C
B
A
CLK
ENP
ENT
CLR
LOAD
D
1,5D
C5/T,3,4+
G4
G3
M1
CT=0
QD
QC
QB
QA
RCO
3CT=MAX
CTR
C
B
A
CLK
ENP
ENT
CLR
LOAD
RCO
RCO
RCO
To More Significant Stages
CLOCK
DISABLE (L)
COUNT (H)
LOAD (L)
DISABLE (L)
COUNT (H)
CLEAR (L)
To More Significant Stages
RCO
RCO
RCO
LOAD
ENT
ENP
CLK
CLR
A
B
C
D
CTR
3CT=MAX
RCO
QA
QB
QC
QD
CT=0
M1
G3
G4
C5/T,3,4+
1,5D
LOAD
ENT
ENP
CLK
CLR
A
B
C
D
CTR
3CT=MAX
QA
QB
QC
QD
CT=0
M1
G3
G4
C5/T,3,4+
1,5D
LOAD
ENT
ENP
CLK
CLR
A
B
C
D
CTR
3CT=MAX
QA
QB
QC
QD
CT=0
M1
G3
G4
C5/T,3,4+
1,5D
D
LSB
1,5D
C5/T,3,4+
G4
G3
M1
CT=0
QD
QC
QB
QA
3CT=MAX
CTR
C
B
A
CLK
ENP
ENT
CLR
LOAD
Figure 1. Ripple Mode Carry Circuit
Figure 2. Carry-Look-Ahesd Circuit
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