參數(shù)資料
型號: 74ALVT16652DL,518
廠商: NXP Semiconductors
文件頁數(shù): 9/14頁
文件大?。?/td> 0K
描述: IC 16BIT BUS TXRX 3-ST 56SSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標準包裝: 1,000
系列: 74ALVT
邏輯類型: 寄存收發(fā)器,非反相
元件數(shù): 2
每個元件的位元數(shù): 8
輸出電流高,低: 8mA,24mA
電源電壓: 2.3 V ~ 2.7 V,3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 56-SSOP
包裝: 帶卷 (TR)
其它名稱: 74ALVT16652DL-T
74ALVT16652DL-T-ND
935209980518
Philips Semiconductors
Product specification
74ALVT16652
2.5V/3.3V 16-bit bus transceiver/register
(3-State)
1998 Feb 13
4
LOGIC DIAGRAM
1D
C1
Q
DETAIL A X 7
nB0
1D
C1
Q
nA0
1of 8 Channels
nA7
nA6
nA5
nA4
nA3
nA2
nA1
nB1
nB2
nB3
nB4
nB5
nB6
nB7
nOEBA
nOEAB
nCPBA
nSBA
nCPAB
nSAB
SH00065
FUNCTION TABLE
INPUTS
DATA I/O
OPERATING MODE
nOEAB
nOEBA
nCPAB
nCPBA
nSAB
nSBA
nAx
nBx
OPERATING MODE
L
H
H or L
H or L
X
Input
Isolation
Store A and B data
X
H
H or L
X
**
X
Input
Unspecified
output*
Store A, Hold B
Store A in both registers
L
X
L
H or L
X
**
Unspecified
output*
Input
Hold A, Store B
Store B in both registers
L
X
H or L
X
L
H
Output
Input
Real time B data to A bus
Stored B data to A bus
H
X
H or L
X
L
H
X
Input
Output
Real time A data to B bus
Store A data to B bus
H
L
H or L
H
Output
Stored A data to B bus
Stored B data to A bus
H = High voltage level
L
= Low voltage level
X = Don’t care
↑ = Low-to-High clock transition
*
The data output function may be enabled or disabled by various signals at the nOEBA and nOEAB inputs. Data input functions are
always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
**
If both Select controls (nSAB and nSBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must
be staggered in order to load both registers.
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