參數(shù)資料
型號: 74ALVT16543DGG,112
廠商: NXP Semiconductors
文件頁數(shù): 12/15頁
文件大?。?/td> 0K
描述: IC 16BIT REGISTERED TXRX 56TSSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 35
系列: 74ALVT
邏輯類型: 寄存收發(fā)器,非反相
元件數(shù): 2
每個(gè)元件的位元數(shù): 8
輸出電流高,低: 32mA,64mA
電源電壓: 2.3 V ~ 2.7 V,3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 56-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 830 (CN2011-ZH PDF)
其它名稱: 568-2540-5
935209940112
Philips Semiconductors
Product data sheet
74ALVT16543
2.5 V/3.3 V 16-bit registered transceiver (3-State)
2004 Sep 14
6
DC ELECTRICAL CHARACTERISTICS (3.3 V
± 0.3 V RANGE)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = –40
°C to +85 °C
UNIT
MIN
TYP1
MAX
VIK
Input clamp voltage
VCC = 3.0 V; IIK = –18 mA
–0.85
–1.2
V
VOH
HIGH-level output voltage
VCC = 3.0 V to 3.6 V; IOH = –100 A
VCC – 0.2
VCC
V
VOH
HIGH-level out ut voltage
VCC = 3.0 V; IOH = –32 mA
2.0
2.3
V
VCC = 3.0 V; IOL = 100 A
0.07
0.2
VOL
LOW–level output voltage
VCC = 3.0 V; IOL = 16 mA
0.25
0.4
V
VOL
LOW–level out ut voltage
VCC = 3.0 V; IOL = 32 mA
0.3
0.5
V
VCC = 3.0 V; IOL = 64 mA
0.4
0.55
VRST
Power-up output low voltage6
VCC = 3.6 V; IO = 1 mA; VI = VCC or GND
0.55
V
VCC = 3.6 V; VI = VCC or GND
Control pins
0.1
± 1
VCC = 0 V or 3.6 V; VI = 5.5 V
0.1
10
II
Input leakage current
VCC = 3.6 V; VI = VCC
4
0.5
1
A
VCC = 3.6 V; VI = 0 V
Data pins4
0.1
–5
VCC = 3.6 V; VI = 5.5 V
0.1
20
IOFF
Off current
VCC = 0 V; VI or VO = 0 V to 4.5 V
0.1
± 100
A
Bus Hold current
VCC = 3 V; VI = 0.8 V
75
130
IHOLD
Bus Hold current
Data inputs7
VCC = 3 V; VI = 2.0 V
–75
–140
A
Data in uts
VCC = 0 V to 3.6 V; VCC = 3.6 V
± 500
IEX
Current into an output in the
High state when VO > VCC
VO = 5.5 V; VCC = 3.0 V
50
125
A
IPU/PD
Power-up/down 3-State output
current3
VCC ≤ 1.2 V; VO = 0.5 V to VCC; VI = GND or VCC;
OE/OE = Don’t care
40
± 100
A
ICCH
VCC = 3.6 V; Outputs HIGH; VI = GND or VCC;
IO = 0 mA
0.07
0.1
ICCL
Quiescent supply current
VCC = 3.6 V; Outputs LOW; VI = GND or VCC;
IO = 0 mA
3.6
5
mA
ICCZ
VCC = 3.6 V; Outputs disabled;
VI = GND or VCC, IO = 0 mA5
0.07
0.1
ICC
Additional supply current per
input pin2
VCC = 3 V to 3.6 V; One input at VCC – 0.6 V;
Other inputs at VCC or GND
0.04
0.4
mA
NOTES:
1. All typical values are at VCC = 3.3 V and Tamb = 25 °C.
2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND.
3. This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 msec. From VCC = 1.2 V to VCC = 3.3 V ± 0.3 V
a transition time of 100
sec is permitted. This parameter is valid for Tamb = 25 °C only.
4. Unused pins at VCC or GND.
5. ICCZ is measured with outputs pulled up to VCC or pulled down to ground.
6. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
7. This is the bus hold overdrive current required to force the input to the opposite logic state.
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