參數(shù)資料
型號: 74ALVT16240DL,118
廠商: NXP Semiconductors
文件頁數(shù): 9/11頁
文件大?。?/td> 0K
描述: IC INVERTER QUAD 4-INPUT 48SSOP
產(chǎn)品培訓模塊: Logic Packages
標準包裝: 1,000
系列: 74ALVT
邏輯類型: 逆變器,緩沖器
電路數(shù): 4
輸入數(shù): 4
特點: 三態(tài)
電源電壓: 2.3 V ~ 2.7 V,3 V ~ 3.6 V
輸出電流高,低: 8mA,24mA; 32mA,64mA
邏輯電平 - 低: 0.7V,0.8V
邏輯電平 - 高: 1.7V,2V
額定電壓和最大 CL 時的最大傳播延遲: 2.5ns @ 2.5V,50pF; 1.7ns @ 3.3V,50pF
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
供應商設備封裝: 48-SSOP
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
包裝: 帶卷 (TR)
其它名稱: 74ALVT16240DL-T
74ALVT16240DL-T-ND
935209520118
Technical Note
BU1571KN
7/8
www.rohm.com
2010.06 - Rev.C
2010 ROHM Co., Ltd. All rights reserved.
Notes for use
(1)Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break
down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode
exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including
the use of fuses, etc.
(2)Operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The electrical
characteristics are guaranteed under the conditions of each parameter.
(3)Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to
the reverse connection, such as mounting an external diode between the power supply and the IC’s power supply terminal.
(4)Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines.
In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the
same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the
diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For the
GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the
same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used
present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant.
(5)GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore,
check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient.
(6)Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break
down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and
the power supply or the GND terminal, the ICs can break down.
(7)Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8)Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore,
be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig
for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the completion of
the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection against static
electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set
PCB.
(9)Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic
element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal.
Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than
the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when
no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a
voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics.
(10)Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from
the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring
pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention
not to cause fluctuations in the GND wiring pattern of external parts as well.
(11)External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in
the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.
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