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參數(shù)資料
| 型號(hào)： | 74ALVC16240 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Triple 3-Input Positive-NAND Gates 14-TSSOP -40 to 85 |
| 中文描述： | 低電壓16位反向緩沖器/線，在3.6V耐壓輸入和輸出驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 80K |
| 代理商： | 74ALVC16240 |
2001 Fairchild Semiconductor Corporation
DS500689
www.fairchildsemi.com
October 2001
Revised October 2001
7
74ALVC16240
Low Voltage 16-Bit Inverting Buffer/Line Driver
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC16240 contains sixteen inverting buffers with 3-
STATE outputs to be employed as a memory and address
driver, clock driver, or bus oriented transmitter/receiver.
The device is nibble (4-bit) controlled. Each nibble has sep-
arate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The 74ALVC16240 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O capability up to 3.6V.
The 74ALVC16240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
I
1.65V to 3.6V V
CC
supply operation
I
3.6V tolerant inputs and outputs
I
t
PD
3.0 ns max for 3.0V to 3.6V V
CC
3.5 ns max for 2.3V to 2.7V V
CC
6.0 ns max for 1.65V to 1.95V V
CC
I
Power-off high impedance inputs and outputs
I
Supports live insertion and withdrawal (Note 1)
I
Uses patented noise/EMI reduction circuitry
I
Latchup conforms to JEDEC JED78
I
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
74ALVC16240MTD
Package Number
MTD48
Package Descriptions
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Description
OE
n
I
0
–
I
15
O
0
–
O
15
Output Enable Input (Active LOW)
Inputs
Outputs
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74ALVC16240MTD | Triple 3-Input Positive-NAND Gates 14-TSSOP -40 to 85 |
| 74ALVC162601 | Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26з Series Resistors in the B-Port Outputs |
| 74ALVC162601T | Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26з Series Resistors in the B-Port Outputs |
| 74ALVC162601TX | 18-Bit Bus Transceiver |
| 74ALVC162827 | Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALVC16240/D | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Low-Voltage 1.8/2.5/3.3 V 16-Bit Buffer |
| 74ALVC16240DGG | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Quad 4-Bit Buffer/Driver |
| 74ALVC16240DL | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Quad 4-Bit Buffer/Driver |
| 74ALVC16240DT | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 74ALVC16240DTR | 功能描述:IC INVERTER DUAL 8-INPUT 48TSSOP RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - 柵極和逆變器 系列:74ALVC 標(biāo)準(zhǔn)包裝:2,000 系列:74LCX 邏輯類(lèi)型:逆變器，緩沖器 電路數(shù):1 輸入數(shù):8 特點(diǎn):三態(tài) 電源電壓:2 V ~ 3.6 V 電流 - 靜態(tài)（最大值）:10µA 輸出電流高，低:24mA，24mA 邏輯電平 - 低:0.7 V ~ 0.8 V 邏輯電平 - 高:1.7 V ~ 2 V 額定電壓和最大 CL 時(shí)的最大傳播延遲:6.5ns @ 3.3V，50pF 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 供應(yīng)商設(shè)備封裝:20-SSOP 封裝/外殼:20-SSOP（0.209"，5.30mm 寬） 包裝:帶卷 (TR) |
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