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| 型號(hào)： | 74AHCT2G08 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Dual 2-input AND gate |
| 中文描述： | 雙2輸入與門(mén) |
| 文件頁(yè)數(shù)： | 10/17頁(yè) |
| 文件大小： | 90K |
| 代理商： | 74AHCT2G08 |
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9397 750 13735
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
10 of 17
Philips Semiconductors
74AHC2G08; 74AHCT2G08
Dual 2-input AND gate
[1]
Typical values are measured at V
CC
= 5.0 V.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
Σ
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
The condition is V
I
= GND to V
CC
.
[2]
[3]
13. Waveforms
Table 11:
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); t
r
= t
f
≤
3.0 ns; see
Figure 7
.
Symbol
Parameter
Conditions
T
amb
= 25
°
C
t
PHL
, t
PLH
propagation delay
nA and nB to nY
V
CC
= 4.5 V to 5.5 V; C
L
= 15 pF
V
CC
= 4.5 V to 5.5 V; C
L
= 50 pF
C
PD
power dissipation
capacitance
T
amb
=
40
°
C to +85
°
C
t
PHL
, t
PLH
propagation delay
nA and nB to nY
V
CC
= 4.5 V to 5.5 V; C
L
= 15 pF
V
CC
= 4.5 V to 5.5 V; C
L
= 50 pF
T
amb
=
40
°
C to +125
°
C
t
PHL
, t
PLH
propagation delay
nA and nB to nY
V
CC
= 4.5 V to 5.5 V; C
L
= 15 pF
V
CC
= 4.5 V to 5.5 V; C
L
= 50 pF
Dynamic characteristics type 74AHCT2G08
Min
Typ
Max
Unit
see
Figure 6
[1]
-
3.6
5.1
19
6.2
7.9
-
ns
ns
pF
[1]
-
C
L
= 50 pF; f
i
= 1 MHz
[2] [3]
-
see
Figure 6
1.0
1.0
-
-
7.1
9.0
ns
ns
see
Figure 6
1.0
1.0
-
-
8.0
10.5
ns
ns
74AHC2G08: V
M
= 50 % V
CC
; V
I
= GND to V
CC
.
74AHCT2G08: V
M
= 1.5 V; V
I
= GND to 3.0 V.
The input (nA and nB) to output (nY) propagation delays.
Fig 6.
mna224
nA, nB input
nY output
t
PLH
t
PHL
GND
V
I
V
M
V
M
V
OH
V
OL
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