參數(shù)資料
型號: 74ACT825SPC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: 8-Bit D-Type Flip-Flop
中文描述: ACT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP24
封裝: 0.300 INCH, PLASTIC, MS-001, DIP-24
文件頁數(shù): 1/7頁
文件大小: 74K
代理商: 74ACT825SPC
2000 Fairchild Semiconductor Corporation
DS009895
www.fairchildsemi.com
July 1988
Revised September 2000
7
74ACT825
8-Bit D-Type Flip-Flop
General Description
The ACT825 is an 8-bit buffered register. They have Clock
Enable and Clear features which are ideal for parity bus
interfacing in high performance microprogramming sys-
tems. Also included are multiple enables that allow multi-
use control of the interface. The ACT825 has noninverting
outputs.
Features
I
Outputs source/sink 24 mA
I
Inputs and outputs are on opposite sides
I
TTL compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
FACT
is a trademark of Fairchild Semiconductor.
Order Number
74ACT825SC
74ACT825MTC
74ACT825SPC
Package Number
M24B
MTC24
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names
Description
D
0
D
7
O
0
O
7
OE
1
, OE
2
, OE
3
EN
Data Inputs
Data Outputs
Output Enables
Clock Enable
CLR
Clear
CP
Clock Input
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