參數(shù)資料
型號: 74ACT164SCX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Serial-In, Parallel-Out Shift Register
中文描述: ACT SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14
封裝: SOIC-14
文件頁數(shù): 2/6頁
文件大小: 112K
代理商: 74ACT164SCX
Functional Description
The 74ACT164 is an edge-triggered 8-bit shift register with
serial data entry and an output from each of the eight
stages. Data is entered serially through one of two inputs (A
or B); either of these inputs can be used as an active High
Enable for data entry through the other input. An unused
input must be tied High.
Each Low-to-High transition on the Clock (CP) input shifts
data one place to the right and enters into Q
0
the logical
AND of the two data inputs (A
#
B) that existed before the
rising clock edge. A Low level on the Master Reset (MR)
input overrides all other inputs and clears the register asyn-
chronously, forcing all Q outputs Low.
Function Table
Operating
Mode
Inputs
Outputs
MR
A
B
Q
0
Q
1
–Q
7
Reset (Clear)
L
X
X
L
L–L
Shift
H
H
H
H
L
L
H
H
L
H
L
H
L
L
L
H
Q
0
–Q
6
Q
0
–Q
6
Q
0
–Q
6
Q
0
–Q
6
H
e
High Voltage Levels
L
e
Low Voltage Levels
X
e
Immaterial
Q
e
Lower case letters indicate the state of the referenced input or
output one setup time prior to the Low-to-High clock transition.
Logic Diagram
TL/F/11553–3
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
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