參數(shù)資料
型號: 74ACT125LCQR
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Quad Buffer with TRI-STATE Outputs
中文描述: ACT SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, CQCC20
封裝: CERAMIC, LCC-20
文件頁數(shù): 3/8頁
文件大小: 162K
代理商: 74ACT125LCQR
DC Characteristics for ’AC Family Devices
(Continued)
74AC
54AC
74AC
Symbol
Parameter
V
CC
(V)
T
A
e a
25
§
C
T
A
e
T
A
e
Units
Conditions
b
55
§
C to
a
125
§
C
b
40
§
C to
a
85
§
C
Typ
Guaranteed Limits
I
OZ
Maximum TRI-STATE
Current
V
I
(OE)
e
V
IL
, V
IH
V
I
e
V
CC
, V
GND
V
O
e
V
CC
, GND
5.5
g
0.5
g
10.0
g
5.0
m
A
I
OLD
2
Minimum Dynamic
Output Current
5.5
50
75
mA
V
OLD
e
1.65V Max
I
OHD
5.5
b
50
b
75
mA
V
OHD
e
3.85V Min
I
CC
Maximum Quiescent
Supply Current
5.5
4.0
80.0
40.0
m
A
V
IN
e
V
CC
or GND
2
Maximum test duration 2.0 ms, one output loaded at a time.
Note :
I
IN
and I
CC
@
3.0V are guaranteed to be less than or equal to the respective limit
@
5.5V V
CC
.
I
CC
for 54AC
@
25
§
C is identical to 74AC
@
25
§
C.
DC Characteristics for ’ACT Family Devices
74ACT
74ACT
Symbol
Parameter
V
CC
(V)
T
A
e a
25
§
C
T
A
e
Units
Conditions
b
40
§
C to
a
85
§
C
Typ
Guaranteed Limits
V
IH
Minimum High Level
Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
V
OUT
e
0.1V
or V
CC
b
0.1V
V
IL
Maximum Low Level
Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
V
OUT
e
0.1V
or V
CC
b
0.1V
V
OH
Minimum High Level
Output Voltage
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
V
I
OUT
e b
50
m
A
*
V
IN
e
V
IL
or V
IH
4.5
5.5
3.86
4.86
3.76
4.76
V
I
OH
b
24 mA
b
24 mA
V
OL
Maximum Low Level
Output Voltage
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
V
I
OUT
e
50
m
A
*
V
IN
e
V
IL
or V
IH
4.5
5.5
0.36
0.36
0.44
0.44
V
I
OL
24 mA
24 mA
I
IN
Maximum Input Leakage Current
5.5
g
0.1
g
1.0
m
A
V
I
e
V
CC
, GND
I
OZ
Maximum TRI-STATE
Current
5.5
g
0.5
g
5.0
m
A
V
I
e
V
IL
, V
IH
V
O
e
V
CC
, GND
I
CCT
Maximum I
CC
/Input
5.5
0.6
1.5
mA
V
I
e
V
CC
b
2.1V
3
I
OLD
2
Minimum Dynamic
Output Current
5.5
75
mA
V
OLD
e
1.65V Max
I
OHD
5.5
b
75
mA
V
OHD
e
3.85V Min
I
CC
Maximum Quiescent
Supply Current
5.5
4.0
40.0
m
A
V
IN
e
V
CC
or GND
*
All outputs loaded; thresholds on input associated with output under test.
2
Maximum test duration 2.0 ms, one output loaded at a time.
3
May be measured per the JEDEC Alternate Method.
3
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