參數(shù)資料
型號(hào): 74AC169SJX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi): 通用總線功能
英文描述: Synchronous Up/Down Counter
中文描述: AC SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDSO16
封裝: 5.30 MM, EIAJ TYPE2, SOP-16
文件頁(yè)數(shù): 1/8頁(yè)
文件大?。?/td> 103K
代理商: 74AC169SJX
1999 Fairchild Semiconductor Corporation
DS009934
www.fairchildsemi.com
November 1988
Revised November 1999
7
74AC169
4-Stage Synchronous Bidirectional Counter
General Description
The AC169 is fully synchronous 4-stage up/down counter.
The AC169 is a modulo-16 binary counter. It features a
preset capability for programmable operation, carry looka-
head for easy cascading and a U/D input to control the
direction of counting. All state changes, whether in count-
ing or parallel loading, are initiated by the LOW-to-HIGH
transition of the Clock.
Features
I
I
CC
reduced by 50%
I
Synchronous counting and loading
I
Built-In lookahead carry capability
I
Presettable for programmable operation
I
Outputs source/sink 24 mA
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
FACT
is a trademark of Fairchild Semiconductor Corporation.
Order Number
74AC169SC
74AC169SJ
74AC169MTC
74AC169PC
Package Number
M16A
M16D
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150
Narrow Body
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300
Wide
Pin Names
Description
CEP
Count Enable Parallel Input
CET
Count Enable Trickle Input
CP
Clock Pulse Input
P
0
P
3
PE
Parallel Data Inputs
Parallel Enable Input
U/D
Up-Down Count Control Input
Q
0
Q
3
TC
Flip-Flop Outputs
Terminal Count Output
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