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參數(shù)資料
| 型號： | 74AC109 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Dual JK Positive Edge-Triggered Flip-Flop |
| 中文描述： | 雙JK上升沿觸發(fā)器 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 100K |
| 代理商： | 74AC109 |
2000 Fairchild Semiconductor Corporation
DS009923
www.fairchildsemi.com
November 1988
Revised August 2000
7
74AC109
74ACT109
Dual JK Positive Edge-Triggered Flip-Flop
General Description
The AC/ACT109 consists of two high-speed completely
independent transition clocked JK flip-flops. The clocking
operation is independent of rise and fall times of the clock
waveform. The JK design allows operation as a D-Type
flip-flop (refer to AC/ACT74 data sheet) by connecting the J
and K inputs together.
Asynchronous Inputs:
LOW input to S
D
(Set) sets Q to HIGH level
LOW input to C
D
(Clear) sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on C
D
and S
D
makes
both Q and Q HIGH
Features
I
I
CC
reduced by 50%
I
Outputs source/sink 24 mA
I
ACT109 has TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
FACT
is a trademark of Fairchild Semiconductor Corporation.
Order Number
74AC109SC
74AC109SJ
74AC109MTC
74AC109PC
74ACT109SC
74AC109MTC
74ACT109PC
Package Number
M16A
M16D
MTC16
N16E
M16A
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300
”
Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names
Description
J
1
, J
2
, K
1
, K
2
CP
1
, CP
2
C
D1
, C
D2
S
D1
, S
D2
Q
1
, Q
2
, Q
1
, Q
2
Data Inputs
Clock Pulse Inputs
Direct Clear Inputs
Direct Set Inputs
Outputs
相關PDF資料 |
PDF描述 |
|---|---|
| 74AC109PC | Dual JK Positive Edge-Triggered Flip-Flop |
| 74AC109SC | Dual JK Positive Edge-Triggered Flip-Flop |
| 74AC109SJ | Dual JK Positive Edge-Triggered Flip-Flop |
| 74AC109MTCX | J-K-Type Flip-Flop |
| 74AC109SCX | J-K-Type Flip-Flop |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74AC109 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74AC109_07 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Dual JK Positive Edge-Triggered Flip-Flop |
| 74AC109E | 制造商:TI/HARRIS 功能描述: |
| 74AC109MTC | 功能描述:觸發(fā)器 Dual J-K Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74AC109MTC_Q | 功能描述:觸發(fā)器 Dual J-K Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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