參數(shù)資料
型號: 74ABTH16899
廠商: NXP Semiconductors N.V.
英文描述: 18-bit latched transceiver with 16-bit parity generator/checker (3-State)(帶16位奇偶發(fā)生器/校驗器的18位鎖存收發(fā)器(三態(tài)))
中文描述: 18位鎖存器,16位奇偶發(fā)生器/檢查(3國)(帶16位奇偶發(fā)生器/校驗器的18位鎖存收發(fā)器(三態(tài)))
文件頁數(shù): 3/16頁
文件大小: 105K
代理商: 74ABTH16899
Philips Semiconductors
Product specification
74ABT16899
74ABTH16899
18-bit latched transceiver with 16-bit
parity generator/checker (3-State)
1998 Feb 25
3
PIN CONFIGURATION
GND
1B6
SEL
GND
OEA
ODD/EVEN
1A6
1A3
1B3
2A7
2B7
2A4
2B4
2B1
OEB
2A1
LEB
2A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
1A0
1A1
1A2
1A4
V
CC
1A5
1A7
1APAR
1ERRA
GND
2ERRA
2APAR
2A6
2A5
V
CC
2A3
2A2
GND
LEA
1B0
1B2
1B1
1B4
V
CC
1B5
1B7
1BPAR
1ERRB
GND
2ERRB
2BPAR
2B6
2B5
V
CC
2B3
2B2
GND
2B0
SH00082
PIN DESCRIPTION
SYMBOL
PIN
NUMBER
NAME AND FUNCTION
1A0 - 1A7
2A0 - 2A7
3, 5, 6, 7, 8, 10, 11, 12
27, 25, 24, 23, 22, 20, 19, 18
Latched A bus 3-State inputs/outputs
1B0 - 1B7
2B0 - 2B7
54, 52, 51, 50, 49, 47, 46, 45
30, 32, 33, 34, 35, 37, 38, 39
Latched B bus 3-State inputs/outputs
1APAR
2APAR
13, 17
A bus parity 3-State input
1BPAR
2BPAR
44, 40
B bus parity 3-State input
ODD/EVEN
1
Parity select input (Low for EVEN parity)
OEA, OEB
2, 29
Output enable inputs (gate A to B,
B to A)
SEL
56
Mode select input (Low for generate)
LEA, LEB
55, 28
Latch enable inputs (transparent High)
1ERRA, 1ERRB
2ERRA, 2ERRB
14, 43,
16, 41
Error signal outputs (active-Low)
GND
4, 15, 26, 31, 42, 53
Ground (0V)
V
CC
9, 21, 36, 48
Positive supply voltage
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