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參數(shù)資料
| 型號： | 74ABTH16500C |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Quadruple 2-Line To 1-Line Data Selectors/Multiplexers With 3-State Outputs 16-SOIC 0 to 70 |
| 中文描述： | 18位通用總線收發(fā)器，三態(tài) |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 88K |
| 代理商： | 74ABTH16500C |
Philips Semiconductors
Product specification
74ABT16500C
74ABTH16500C
18-bit universal bus transceiver (3-State)
2
1998 Feb 27
853-1800 19027
FEATURES
18-bit bidirectional bus interface
3-State buffers
74ABTH16500C incorporates bus-hold data inputs which
eliminate the need for external pull-up resistors to hold unused
inputs
Output capability: +64mA/-32mA
TTL input and output switching levels
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
Negative edge-triggered clock inputs
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
Flexible operation permits 18 embedded D-type latches or
flip-flops to operate in clocked, transparent, or latched modes.
DESCRIPTION
The 74ABT16500C is a high-performance BiCMOS Device which
combines low static and dynamic power dissipation with high speed
and high output drive.
This device is an 18-bit universal transceiver featuring non-inverting
3-State bus compatible outputs in both send and receive directions.
Data flow in each direction is controlled by output enable (OEAB and
OEBA), latch enable (LEAB and LEBA), and clock (CPAB and
CPBA) inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is High. When LEAB is Low, the A
data is latched if CPAB is held at a High or Low logic level. If LEAB
is Low, the A-bus data is stored in the latch/flip-flop on the
High-to-Low transition of CPAB. When OEAB is High, the outputs
are active. When OEAB is Low, the outputs are in the
high-impedance state.
Data flow for B-to-A is similar to that of A-to-B but uses OEBA,
LEBA and CPBA. The output enables are complimentary (OEAB is
active High, and OEBA is active Low).
Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
Two options are available, 74ABT16500C which does not have the
bus-hold feature and 74ABTH16500C which incorporates the
bus-hold feature.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0V
C
L
= 50pF;
V
CC
= 5V
V
I
= 0V or V
CC
Outputs disabled; V
I/O
= 0V or V
CC
Outputs disabled; V
CC
= 5.5V
Outputs low; V
CC
= 5.5V
TYPICAL
UNIT
t
PLH
t
PHL
C
IN
C
I/O
I
CCZ
I
CCL
Propagation delay
An to Bn or Bn to An
Input capacitance (Control pins)
2.1
1.7
3
ns
pF
I/O pin capacitance
7
pF
μ
A
mA
Quiescent supply current
500
8
ORDERING INFORMATION
PACKAGES
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
TEMPERATURE RANGE
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
OUTSIDE NORTH AMERICA
74ABT16500C DL
74ABT16500C DGG
74ABTH16500C DL
74ABTH16500C DGG
NORTH AMERICA
BT16500C DL
BT16500C DGG
BH16500C DL
BH16500C DGG
DWG NUMBER
SOT371-1
SOT364-1
SOT371-1
SOT364-1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ABTH16823DGGRE4 | 功能描述:觸發(fā)器 18-Bit Bus-Interface F-F W/3-State Otpt RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ABTH16823DGGRG4 | 功能描述:觸發(fā)器 18B Bus-Interface Flip-Flops RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ABTH16823DLRG4 | 功能描述:觸發(fā)器 18-Bit Bus-Interface F-F W/3-State Otpt RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ABTH16899DGG,112 | 功能描述:總線收發(fā)器 18-BIT LATCH XCVR W/PAR/BUS 3S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74ABTH16899DGG,118 | 功能描述:總線收發(fā)器 18-BIT LATCH XCVR W/PAR/BUS 3S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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