參數(shù)資料
型號(hào): 74ABT841
廠商: NXP Semiconductors N.V.
英文描述: 10-bit bus interface latch (3-State)(10位總線接口鎖存器(三態(tài)))
中文描述: 10位總線接口鎖存器(3態(tài))(10位總線接口鎖存器(三態(tài)))
文件頁(yè)數(shù): 4/6頁(yè)
文件大小: 69K
代理商: 74ABT841
Philips Semiconductors
Product specification
74ABT841
10-bit bus interface latch (3-State)
4
1995 Sep 06
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
°
C
T
amb
= –40
°
C
to +85
°
C
UNIT
Min
Typ
Max
Min
Max
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
–0.9
–1.2
–1.2
V
2.5
3.5
2.5
V
V
OH
High-level output voltage
3.0
4.0
3.0
V
2.0
2.6
2.0
V
V
OL
Low-level output voltage
0.42
0.55
0.55
V
V
RST
Power-up output low
voltage
3
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
0.13
0.55
0.55
V
I
I
Input leakage
current
Power-off leakage current
Control pins
Data pins
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 0.0V; V
O
or V
I
4.5V
V
CC
= 2.0V; V
O
= 0.5V; V
I
= GND or V
CC
;
V
OE
= V
CC
V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
V
CC
= 5.5V; V
O
= 2.5V
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs 3–State;
V
I
= GND or V
CC
One input at 3.4V, other inputs at V
CC
or
= 5 5V
GND; V
CC
= 5.5V
±
0.01
±
5
±
5.0
±
1.0
±
100
±
100
±
1.0
±
100
±
100
μ
A
μ
A
μ
A
I
OFF
I
PU/PD
Power-up/down 3–state
output current
4
±
5.0
±
50
±
50
μ
A
I
IH
+ I
OZH
I
IL
+ I
OZL
I
CEX
I
O
I
CCH
I
CCL
3-State output High current
5.0
50
50
μ
A
μ
A
μ
A
3-State output Low current
–5.0
–50
–50
Output high leakage current
5.0
50
50
Output current
1
–50
–100
–180
–50
–180
mA
0.5
250
250
μ
A
Quiescent supply current
25
38
38
mA
I
CCZ
0.5
250
250
μ
A
I
CC
Additional supply current per
input pin
2
0 5
0.5
1 5
1.5
1 5
1.5
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
CC
between 0V and 2.1V with a transition time of up to 10msec. For V
CC
= 2.1V to V
CC
= 5V
transition time of up to 100
μ
sec is permitted.
10%, a
AC CHARACTERISTICS
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
o
C
V
CC
= +5.0V
T
amb
= -40 to
+85
o
C
V
CC
= +5.0V
±
0.5V
Min
UNIT
Min
Typ
Max
Max
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
Dn to Qn
2
2.1
2.0
4.1
4.0
5.5
5.5
2.1
2.0
6.2
6.2
ns
Propagation delay
LE to Qn
1
2.1
2.8
4.1
4.6
5.9
6.2
2.1
2.8
6.5
6.7
ns
Output enable time
to High and Low level
4
5
1.0
2.2
3.0
4.1
4.5
5.6
1.0
2.2
5.3
6.3
ns
Output disable time
from High and Low level
4
5
2.7
2.8
4.7
4.6
6.2
6.1
2.7
2.8
7.1
6.5
ns
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