參數(shù)資料
型號(hào): 74ABT74PWDH
廠(chǎng)商: NXP SEMICONDUCTORS
元件分類(lèi): 通用總線(xiàn)功能
英文描述: Dual D-type flip-flop
中文描述: ABT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
封裝: PLASTIC, TSSOP1-14
文件頁(yè)數(shù): 1/5頁(yè)
文件大小: 65K
代理商: 74ABT74PWDH
Philips Semiconductors
Product specification
74ABT74
Dual D-type flip-flop
1
853-1813 15793
1995 Sep 22
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C;
TYPICAL
UNIT
t
PLH
t
PHL
Propagation
delay
CPn to
Qn, Qn
Output to
Output skew
Input
capacitance
Total supply
current
C
L
= 50pF;
V
= 5V
CC
3.0
2.5
ns
t
OSLH
t
OSHL
0.5
ns
C
IN
V
I
= 0V or V
CC
3
pF
I
CC
Outputs disabled;
V
CC
= 5.5V
50
μ
A
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
V
CC
SD1
Q1
Q1
CP1
RD1
D1
RD1
D0
Q0
CP0
SD1
Q0
SF00045
PIN DESCRIPTION
PIN NUMBER
1, 2, 3, 4, 10,
11, 12, 13
5, 6, 8, 9
7
14
SYMBOL
RDn, Dn,
CPn, SDn
Qn, Qn
GND
V
CC
NAME AND FUNCTION
Data inputs
Data outputs
Ground (0V)
Positive supply voltage
LOGIC SYMBOL
Q0 Q0 Q1 Q1
5
6
9
8
V
= Pin 14
GND = Pin 7
3
4
1
11
10
13
CP0
SD0
RD0
CP1
SD1
RD1
D0
D1
2
12
SA00359
DESCRIPTION
The 74ABT74 is a dual positive edge-triggered D-type flip-flop
featuring individual data, clock, set, and reset inputs; also true and
complementary outputs. Set (SD) and reset (RD) are asynchronous
active low inputs and operate independently of the clock input.
When set and reset are inactive (high), data at the D input is
transferred to the Q and Q outputs on the low-to-high transition of
the clock. Data must be stable just one setup time prior to the
low-to-high transition of the clock for predictable operation. Clock
triggering occurs at a voltage level and is not directly related to the
transition time of the positive-going pulse. Following the hold time
interval, data at the D input may be changed without affecting the
levels of the output.
LOGIC SYMBOL (IEEE/IEC)
4
3
2
1
10
11
12
13
5
6
9
8
&
S
S
C1
C2
R
1D
2D
R
SF00047
LOGIC DIAGRAM
V
= Pin 14
GND = Pin 7
5, 9
6, 8
Q
Q
4, 10
1, 13
3, 11
2, 12
SD
RD
CP
D
SF00048
ORDERING INFORMATION
PACKAGES
14-Pin Plastic DIP
14-Pin plastic SO
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
OUTSIDE NORTH AMERICA
74ABT74 N
74ABT74 D
74ABT74 DB
74ABT74 PW
NORTH AMERICA
74ABT74 N
74ABT74 D
74ABT74 DB
74ABT74PW DH
DWG NUMBER
SOT27-1
SOT108-1
SOT337-1
SOT402-1
相關(guān)PDF資料
PDF描述
74ABT823 9-bit D-type flip-flop with reset and enable 3-State
74ABT823D 9-bit D-type flip-flop with reset and enable 3-State
74ABT823DB 9-bit D-type flip-flop with reset and enable 3-State
74ABT823N 9-bit D-type flip-flop with reset and enable 3-State
74ABT823PW 9-bit D-type flip-flop with reset and enable 3-State
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74ABT74PW-T 功能描述:觸發(fā)器 DUAL D-TYPE FLIPFLOP RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74ABT821D 功能描述:觸發(fā)器 10-BIT D-TYPE 3-S RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74ABT821D,602 功能描述:觸發(fā)器 10-BIT D-TYPE 3-S RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
74ABT821D,623 功能描述:觸發(fā)器 10-BIT D-TYPE 3-S RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
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