參數(shù)資料
型號(hào): 74ABT651N
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: Dual 4-input positive-NAND gates 14-SOIC 0 to 70
中文描述: ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDIP24
封裝: 0.300 INCH, PLASTIC, MS-001, SOT-222-1, DIP-24
文件頁(yè)數(shù): 1/7頁(yè)
文件大小: 88K
代理商: 74ABT651N
Philips Semiconductors
Product specification
74ABT651
Octal transceiver/register, inverting (3-State)
1
1995 Sep 06
853-1783 15703
FEATURES
Independent registers for A and B buses
The 74ABT651 is the inverting version of the 74ABT652
Multiplexed real-time and stored data
3-State outputs
Live insertion/extraction permitted.
Power-up 3-State
Power-up reset
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT651 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT651 transceiver/register consists of bus transceiver
circuits with 3-State outputs, D-type flip-flops, and control circuitry
arranged for multiplexed transmission of data directly from the input
bus or the internal registers. Data on the A or B bus will be clocked
into the registers as the appropriate clock pin goes High. Output
Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for
bus management.
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74ABT651.
The select pins determine whether data is stored or transferred
through the device in real time.
The output enable pins determine the direction of the data flow.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
CPBA to An or CPAB to Bn
C
L
= 50pF; V
CC
= 5V
3.8
4.4
ns
C
IN
Input capacitance
V
I
= 0V or V
CC
4
pF
C
I/O
I/O capacitance
Outputs disabled; V
O
= 0V or V
CC
7
pF
I
CCZ
Total supply current
Outputs disabled; V
CC
=5.5V
110
μ
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
24-Pin Plastic DIP
–40
°
C to +85
°
C
74ABT651 N
74ABT651 N
SOT222-1
24-Pin plastic SO
–40
°
C to +85
°
C
74ABT651 D
74ABT651 D
SOT137-1
24-Pin Plastic SSOP Type II
–40
°
C to +85
°
C
74ABT651 DB
74ABT651 DB
SOT340-1
24-Pin Plastic TSSOP Type I
–40
°
C to +85
°
C
74ABT651 PW
74ABT651PW DH
SOT355-1
PIN CONFIGURATION
SA00094
CPAB
SAB
OEAB
A0
A1
A2
A3
A4
A5
A6
A7
GND
1
2
3
4
5
6
7
8
9
10
11
12
V
CC
CPBA
SBA
OEBA
B0
B1
B2
B3
B4
B5
B6
B7
13
14
15
16
17
18
19
20
21
22
23
24
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1, 23
CPAB /
CPBA
SAB /
SBA
A to B clock input / B to A clock input
2, 22
A to B select input / B to A select input
3, 21
OEAB /
OEBA
A to B Output Enable input /
B to A Output Enable input
(active–Low)
4, 5, 6, 7, 8,
9, 10, 11
20, 19, 18,
17, 16, 15,
14, 13
A0 – A7
Data inputs/outputs (A side)
B0 – B7
Data inputs/outputs (B side)
12
24
GND
V
CC
Ground (0V)
Positive supply voltage
相關(guān)PDF資料
PDF描述
74ABT651PW Octal transceiver/register, inverting 3-State
74ABT651DB-T Industry-Standard, 12-Bit ADC with Reference
74ABT651D-T Single 8-Bit Inverting Bus Transceiver
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74ABT651PWDH Octal transceiver/register, inverting 3-State
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