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參數(shù)資料
| 型號： | 74ABT373CSMQB |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Octal Transparent Latch with TRI-STATE Outputs |
| 中文描述： | 八路透明鎖存器與三態(tài)輸出 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 338K |
| 代理商： | 74ABT373CSMQB |
DC Electrical Characteristics
(SOIC Package) (Continued)
Symbol
Parameter
Min
Typ
Max
Units
V
CC
Conditions
C
L
e
50 pF, R
L
e
500
X
T
A
e
25
§
C (Note 1)
T
A
e
25
§
C (Note 1)
T
A
e
25
§
C (Note 3)
T
A
e
25
§
C (Note 2)
T
A
e
25
§
C (Note 2)
V
OLP
Quiet Output Maximum Dynamic V
OL
0.4
0.8
V
5.0
V
OLV
Quiet Output Minimum Dynamic V
OL
b
1.2
b
0.8
V
5.0
V
OHV
Minimum High Level Dynamic Output Voltage
2.5
3.0
V
5.0
V
IHD
Minimum High Level Dynamic Input Voltage
2.0
1.7
V
5.0
V
ILD
Maximum Low Level Dynamic Input Voltage
0.9
0.6
V
5.0
Note 1:
Max number of outputs defined as (n). n
b
1 data inputs are driven 0V to 3V. One output at Low. Guaranteed, but not tested.
Note 2:
Max number of data inputs (n) switching. n
b
1 inputs switching 0V to 3V. Input-under-test switching: 3V to theshold (V
ILD
), 0V to threshold (V
IHD
).
Guaranteed, but not tested.
Note 3:
Max number of outputs defined as (n). n
b
1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
AC Electrical Characteristics
Symbol
Parameter
74ABT
54ABT
74ABT
Units
T
A
e a
25
§
C
V
CC
e a
5.0V
C
L
e
50 pF
T
A
e b
55
§
C to
a
125
§
C
V
CC
e
4.5V to 5.5V
C
L
e
50 pF
T
A
e b
40
§
C to
a
85
§
C
V
CC
e
4.5V to 5.5V
C
L
e
50 pF
Min
Typ
Max
Min
Max
Min
Max
t
PLH
t
PHL
Propagation Delay
D
n
to O
n
1.9
1.9
2.7
2.8
4.5
4.5
1.0
1.0
6.8
7.0
1.9
1.9
4.5
4.5
ns
t
PLH
t
PHL
Propagation Delay
LE to O
n
2.0
2.0
3.1
3.0
5.0
5.0
1.0
1.5
7.7
7.7
2.0
2.0
5.0
5.0
ns
t
PZH
t
PZL
Output Enable Time
1.5
1.5
3.1
3.1
5.3
5.3
1.0
1.5
6.7
7.2
1.5
1.5
5.3
5.3
ns
t
PHZ
t
PLZ
Output Disable Time
2.0
2.0
3.6
3.4
5.4
5.4
1.7
1.0
8.0
7.0
2.0
2.0
5.4
5.4
ns
AC Operating Requirements
Symbol
Parameter
74ABT
54ABT
74ABT
Units
T
A
e a
25
§
C
V
CC
e a
5.0V
C
L
e
50 pF
T
A
e b
55
§
C to
a
125
§
C
V
CC
e
4.5V to 5.5V
C
L
e
50 pF
T
A
e b
40
§
C to
a
85
§
C
V
CC
e
4.5V to 5.5V
C
L
e
50 pF
Min
Typ
Max
Min
Max
Min
Max
f
toggle
Max Toggle
Frequency
100
100
MHz
t
s
(H)
t
s
(L)
Setup Time, HIGH
or LOW D
n
to LE
1.5
1.5
2.5
2.5
1.5
1.5
ns
t
h
(H)
t
h
(L)
Hold Time, HIGH
or LOW D
n
to LE
1.0
1.0
2.5
2.5
1.0
1.0
ns
t
w
(H)
Pulse Width,
LE HIGH
3.0
3.3
3.0
ns
4
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PDF描述 |
|---|---|
| 74ABT373CSMX | Octal Transparent Latch with TRI-STATE Outputs |
| 74AC132 | Quad 2−Input NAND Schmitt Trigger |
| 74ACT132 | Quad 2−Input NAND Schmitt Trigger |
| 74AC16x | Synchronous Presettable Binary Counter |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ABT373CSMX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Octal Transparent Latch with TRI-STATE Outputs |
| 74ABT373CWC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit D-Type Latch |
| 74ABT373D-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit D-Type Latch |
| 74ABT374 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Octal D-Type Flip-Flop with 3-STATE Outputs |
| 74ABT374_07 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Octal D-Type Flip-Flop with 3-STATE Outputs |
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