參數(shù)資料
型號(hào): 74ABT373CDMX
廠商: National Semiconductor Corporation
英文描述: Octal Transparent Latch with TRI-STATE Outputs
中文描述: 八路透明鎖存器與三態(tài)輸出
文件頁數(shù): 3/16頁
文件大?。?/td> 338K
代理商: 74ABT373CDMX
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature
b
65
§
C to
a
150
§
C
b
55
§
C to
a
125
§
C
Ambient Temperature under Bias
Junction Temperature under Bias
Ceramic
Plastic
b
55
§
C to
a
175
§
C
b
55
§
C to
a
150
§
C
V
CC
Pin Potential to
Ground Pin
b
0.5V to
a
7.0V
b
0.5V to
a
7.0V
b
30 mA to
a
5.0 mA
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Any Output
in the Disabled or
Power-Off State
in the HIGH State
b
0.5V to
a
5.5V
b
0.5V to V
CC
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
DC Latchup Source Current:
(Across Comm Operating Range) Other Pins
OE Pin
b
150 mA
b
500 mA
Over Voltage Latchup (I/O)
10V
Note 1:
Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.
Note 2:
Either voltage limit or current limit is sufficient to protect inputs.
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
Commercial
Supply Voltage
Military
Commercial
Minimum Input Edge Rate
Data Input
Enable Input
b
55
§
C to
a
125
§
C
b
40
§
C to
a
85
§
C
a
4.5V to
a
5.5V
a
4.5V to
a
5.5V
(
D
V/
D
t)
50 mV/ns
20 mV/ns
DC Electrical Characteristics
Symbol
Parameter
ABT373
Units
V
CC
Conditions
Min
Typ
Max
V
IH
Input HIGH Voltage
2.0
V
Recognized HIGH Signal
V
IL
Input LOW Voltage
0.8
V
Recognized LOW Signal
V
CD
Input Clamp Diode Voltage
b
1.2
V
Min
I
IN
e b
18 mA
I
OH
e b
3 mA
I
OH
e b
24 mA
I
OH
e b
32 mA
I
OL
e
48 mA
I
OL
e
64 mA
V
IN
e
2.7V (Note 2)
V
IN
e
V
CC
V
IN
e
7.0V
V
IN
e
0.5V (Note 2)
V
IN
e
0.0V
I
ID
e
1.9
m
A
All Other Pins Grounded
V
OH
Output HIGH Voltage
54ABT/74ABT
2.5
2.0
2.0
54ABT
74ABT
V
Min
V
OL
Output LOW Voltage
54ABT
74ABT
0.55
0.55
V
Min
I
IH
Input HIGH Current
5
5
m
A
Max
I
BVI
Input HIGH Current Breakdown Test
7
m
A
Max
I
IL
Input LOW Current
b
5
b
5
m
A
Max
V
ID
Input Leakage Test
4.75
V
0.0
I
OZH
Output Leakage Current
50
m
A
0
b
5.5V V
OUT
e
2.7V; OE
e
2.0V
0
b
5.5V V
OUT
e
0.5V; OE
e
2.0V
V
OUT
e
0.0V
V
OUT
e
V
CC
V
OUT
e
5.5V; All Others GND
I
OZL
Output Leakage Current
b
50
m
A
I
OS
Output Short-Circuit Current
b
100
b
275
mA
Max
I
CEX
Output High Leakage Current
50
m
A
Max
I
ZZ
Bus Drainage Test
100
m
A
0.0
I
CCH
Power Supply Current
50
m
A
Max
All Outputs HIGH
I
CCL
Power Supply Current
30
mA
Max
All Outputs LOW
I
CCZ
Power Supply Current
50
m
A
Max
OE
e
V
CC
All Others at V
CC
or GND
V
I
e
V
CC
b
2.1V
Enable Input V
I
e
V
CC
b
2.1V
Data Input V
I
e
V
CC
b
2.1V
All Others at V
CC
or GND
Outputs Open, LE
e
V
CC
OE
e
GND, (Note 1)
One Bit Toggling, 50% Duty Cycle
I
CCT
Additional I
CC
/Input
Outputs Enabled
Outputs TRI-STATE
Outputs TRI-STATE
2.5
2.5
2.5
mA
mA
mA
Max
I
CCD
Dynamic I
CC
(Note 2)
No Load
mA/
MHz
Max
0.12
Note 1:
For 8 bits toggling, I
CCD
k
0.8 mA/MHz.
Note 2:
Guaranteed, but not tested.
3
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