參數(shù)資料
型號(hào): 74ABT16899DL
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: 18-bit latched transceiver with 16-bit parity generator/checker 3-State
中文描述: ABT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝: 7.50 MM, PLASTIC, MO-118AB, SOT-371-1, SSOP-56
文件頁(yè)數(shù): 4/16頁(yè)
文件大?。?/td> 105K
代理商: 74ABT16899DL
Philips Semiconductors
Product specification
74ABT16899
74ABTH16899
18-bit latched transceiver with 16-bit
parity generator/checker (3-State)
1998 Feb 25
4
LOGIC SYMBOL
3
5
6
7
8
10
11
12
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
54
52
51
50
49
47
46
45
14
43
55
56
28
1
LEA
SEL
LEB
ODD/EVEN
1ERRA
1ERRB
13
1APAR
1BPAR
44
2
29
OEB
OEA
SH00083
27
25
24
23
22
20
19
18
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
30
32
33
34
35
37
38
39
16
41
55
56
28
1
LEA
SEL
LEB
ODD/EVEN
2ERRA
2ERRB
17
2APAR
2BPAR
40
2
29
OEB
OEA
PARITY AND ERROR FUNCTION TABLE
INPUTS
OUTPUTS
SEL
ODD/EVEN
xPAR
(A or B)
Σ
of High
Inputs
xPAR
(B or A)
ERRt
ERRr*
PARITY MODES
H
H
H
Even
Odd
Even
Odd
Even
Odd
Even
Odd
Even
Odd
Even
Odd
Even
Odd
Even
Odd
H
H
L
L
H
H
L
L
H
L
H
L
L
H
L
H
H
L
L
H
L
H
H
L
H
L
L
H
L
H
H
L
H
L
L
H
L
H
H
L
H
H
H
H
H
H
H
H
Odd
Mode
H
H
L
Feed-through/check parity
H
L
H
Even
Mode
H
L
L
L
H
H
Odd
Mode
L
H
L
Generate parity
L
L
H
Even
Mode
L
L
L
H =
L
t
r
*
High voltage level
Low voltage level
Transmit–if the data path is from A
B then ERRt is ERRA
Receive–if the data path is from A
B then ERRr is ERRB
Blocked if latch is not transparent
=
=
=
相關(guān)PDF資料
PDF描述
74ABTH16899DL 18-bit latched transceiver with 16-bit parity generator/checker 3-State
74ABT16899 18-bit latched transceiver with 16-bit parity generator/checker 3-State
74ABTH16899 18-bit latched transceiver with 16-bit parity generator/checker (3-State)(帶16位奇偶發(fā)生器/校驗(yàn)器的18位鎖存收發(fā)器(三態(tài)))
74ABT16899DGG 18-bit latched transceiver with 16-bit parity generator/checker 3-State
74ABTH16899DGG 18-bit latched transceiver with 16-bit parity generator/checker 3-State
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