參數(shù)資料
型號: 73S8023C-IM/F
廠商: Maxim Integrated Products
文件頁數(shù): 3/27頁
文件大小: 0K
描述: IC SMART CARD INTERFACE 32-QFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 490
控制器類型: 智能卡接口
電源電壓: 2.7 V ~ 3.6 V
電流 - 電源: 4.9mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN(5x5)
包裝: 管件
DS_8023C_019
73S8023C Data Sheet
Rev. 1.5
11
8
Activation and Deactivation
8.1
Activation Sequence (Synchronous Mode)
The 73S8023C smart card interface IC has an internal ~10 ms delay at power-on reset or on application
of VDD > VDDF
1.
CMDVCC is set low.
. No activation is allowed at this time.
CMDVCC (edge triggered) must then be set low to
activate the card.
The following steps list the activation sequence and the timing of the card control signals when the
system controller sets
CMDVCC low:
2.
Turn on VCC and I/O (AUX1, AUX2) to reception mode at the end of (tACT
3.
RST is a copy of
RSTIN and CLK is a copy of STROBE after (t
).
1).
Figure 3: Activation Sequence – Synchronous Mode
8.2
Deactivation Sequence (Synchronous Mode)
Deactivation is initiated either by the system controller by setting the
CMDVCC high, or automatically in
the event of hardware faults. Hardware faults are over-current, overheating, VDD
1.
RST goes low at time t
fault and card extraction
during the session and are indicated to the system controller by the fall of
OFF.
The following steps list the deactivation sequence and the timing of the card control signals when the
system controller sets the
CMDVCC high or a fault condition sets OFF low:
1
2.
CLK stops low at time t
.
2
3.
I/O goes low at time t
.
3
4.
V
. Out of reception mode.
CC is shut down at time t 4. After a delay t 5 (discharge of the V CC capacitor), VCC is low.
CMDVCC
VCC
IO
CLK
RSTIN
tACT
t1
RST
STROBE
tACT ~= 500s
t1 > 0.5s after tACT, RST = RSTIN, CLK = STROBE
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73S8023C-IMR/F2 功能描述:輸入/輸出控制器接口集成電路 RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
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