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參數(shù)資料
| 型號： | 73S8009CN-32IMR/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, QCC32 |
| 封裝： | 5 X 5 MM, ROHS COMPLIANT, QFN-32 |
| 文件頁數(shù)： | 11/30頁 |
| 文件大小： | 349K |
| 代理商： | 73S8009CN-32IMR/F |
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DS_8009CN_026
73S8009CN Data Sheet
Rev. 1.4
19
3.6
Activation and De-activation Sequence
The host controller is fully responsible for the activation sequencing of the smart card signals CLK, RST,
I/O, AUX1 and AUX2. All these signals are held low by the 73S8009CN when the card is in the de-
activated state. Upon card activation (the fall of
CMDVCC (#/%)), all the signals are held low by the
73S8009CN until RDY goes high. The host should set the signals RSTIN, I/OUC, CLKIN, AUX1UC and
AUX2UC low prior to activating the card and allow RDY to go high before transitioning any of these
signals. In order to initiate activation, the card must be present and
OFF must be high.
CMDVCC5 or CMDVCC3
VCC
I/OUC
I/O
RDY
RSTIN
RST
CLKIN
CLK
Ignored
I/O, AUX1, AUX2, CLK, RST are held LOW until RDY = 1 and CMDVCCx = 0
I/O = I/OUC if RDY=1
CLK=CLKIN if RDY=1
RST = RSTIN if RDY=1
t1
At t1 (500us), if RDY=0 or overcurrent, circuit will de-activate (safety feature)
VCC valid
Figure 5: Activation Sequence
Deactivation is initiated either by the system controller by setting both
CMDVCC (#/%) high, or
automatically in the event of hardware faults or assertion of the OFF_ACK signal. Hardware faults are
over-current, under-voltage, and card extraction during the session. The host can manage the I/O
signals, CLKIN, RSTIN, and
CMDVCC (#/%) to create other de-activation sequences for non-emergency
situations.
The following steps show the deactivation sequence and the timing of the card control signals when the
system controller sets the CMDVCC(x)B high:
1.
RST goes low at the end of time t1.
2.
De-assert CLK at the end of time t2.
3.
I/O goes low at the end of time t3. Exit reception mode.
4.
De-assert internal VCC_ON at the end of time t4. After a delay, VCC is de-asserted.
Note: Since the 73S8009CN does not control the waveshape of CLK (it is determined by the input form
the host CLKIN), there is no guarantee that the duty cycle of the last CLK high pulse will conform to duty
cycle requirements during an emergency deactivation.
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PDF描述 |
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| 73S8009CN-32IM/F | SPECIALTY ANALOG CIRCUIT, QCC32 |
| 73S8009R-IM/F | SPECIALTY ANALOG CIRCUIT, QCC20 |
| 73S8009R-ILR/F | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| 73S8009R-IL/F | SPECIALTY ANALOG CIRCUIT, PDSO28 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 73S8009CN-DB | 功能描述:界面開發(fā)工具 73S8009CN Demo Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| 73S8009R | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Low Cost Versatile Smart Card Interface |
| 73S8009R-DB | 功能描述:界面開發(fā)工具 73S8009R Demo Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| 73S8009R-IL/F | 功能描述:輸入/輸出控制器接口集成電路 Smart Card Interface IC RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8009R-ILR/F | 功能描述:輸入/輸出控制器接口集成電路 Smart Card Interface IC RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
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