參數(shù)資料
型號： 73S1217F-68IMR/F/P
廠商： Maxim Integrated Products
文件頁數(shù)： 49/93頁
文件大小： 0K
描述： IC SMART CARD READER PROG 68-QFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
系列： 73S12xx
核心處理器： 80515
芯體尺寸： 8-位
速度： 24MHz
連通性： I²C，智能卡，UART/USART，USB
外圍設(shè)備： LED，POR，WDT
輸入/輸出數(shù)： 8
程序存儲器容量： 64KB（64K x 8）
程序存儲器類型： 閃存
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 6.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 68-VFQFN 裸露焊盤
包裝： 帶卷 (TR)
UG_12xxF_016
73S12xxF Software User Guide
Rev. 1.50
53
PowerOFF()
Purpose
Manage power consumption.
Synopsis
void PowerOFF ( IN unsigned int PowerSelect );
Parameters
PowerSelect: Input parameter
Specifies which internal devices to disable. The following possible values or any
combination (by OR’ing them) are allowed:
DISABLE_EICC
BIT14
// External Smart card.
DISABLE_VDDF
BIT13
DISABLE_UART
BIT12
DISABLE_PLL
BIT11
DISABLE_ANALOG
BIT10
DISABLE_USBXCVR
BIT9
DISABLE_USB
BIT8
DISABLE_RTC
BIT7
DISABLE_KEYPAD
BIT6
DISABLE_ICC
BIT5
DISABLE_ USBCLK
BIT4
DISABLE_LS_OSC
BIT3
// Bit 2 reserved.
CPU_HALT
BIT1
CPU_IDLE
BIT0
Return Codes
None.
Devices which are already disabled will remain disabled. Any enabled interrupt will cause an exit from
this function.
CPU_HALT has precedence over CPU_IDLE. CPU_IDLE mode stops the clock going to the CPU, all
other clocks keep running.
CPU_HALT mode can be stopped by the USB and RTC interrupts (if available), by a key press, by ICC
insertion or removal or by Reset of the 73S12xxF. In order to use these external events to wake up the
CPU, they must first be individually initialized. For example, ICC_InitUART() or KEY_Init () should be
called prior to calling PowerOFF (DISABLE_ICC) or PowerOFF (DISABLE_KEYPAD). Internally, the API
will configure INT0 to be active upon any of the events (key press, Smart Card event, etc..); thus an
application may setup its own INT0 interrupt service routine via Set_Event (eEXT0, ...) to customize its
specific needs upon waking up.
4.2.10 Analog Threshold Management Driver API – Available with all 73S12xxF Devices
This API controls the analog voltage comparison against the voltage on the ANA_IN pin. The API
includes:
ANALOG_Detect_Enable()
Purpose
Select the analog threshold level and enable the interrupt according to the polarity setting.
Synopsis
void ANALOG_Detect_Enable (
IN Unsigned char threshold_select,
IN Unsigned char acomp_pol)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
73S1217F-68M/F/PB 制造商:Maxim Integrated Products 功能描述:OLD P/N 73S1217F-68IM/F/P = NEW P/N 73S1217F-68M/F/PB PIN PD - Rail/Tube
73S1217F-68M/F/PE 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
73S1217F-68MR/F/PE 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
73S1217F-EB 功能描述:開發(fā)板和工具包 - 8051 73S1217F Eval Brd (Usb Cable, Doc. Cd) RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
73S1217F-EB-Lite 功能描述:開發(fā)板和工具包 - 8051 73S1217F EVB Lite w/Plug & Play/Usb RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
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