參數(shù)資料
型號: 73S1215F-44IMR/F/P
廠商: Maxim Integrated Products
文件頁數(shù): 53/136頁
文件大?。?/td> 0K
描述: IC SMART CARD READER PROG 44-QFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
系列: 73S12xx
核心處理器: 80515
芯體尺寸: 8-位
速度: 24MHz
連通性: I²C,智能卡,UART/USART,USB
外圍設(shè)備: LED,POR,WDT
輸入/輸出數(shù): 9
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VFQFN 裸露焊盤
包裝: 帶卷 (TR)
DS_1215F_003
73S1215F Data Sheet
Rev. 1.4
23
Table 11: Port Registers
Register
SFR
Address
R/W
Description
USR70
0x90
R/W
Register for User port bit 7:0 read and write operations (pins USR0…
USR7).
UDIR70
0x91
R/W
Data direction register for User port bits 0:7. Setting a bit to 0 means that
the corresponding pin is an output.
USR8
0xA0
R/W
Register for User port bit 8 read and write operations (pin *USR8).
UDIR8
0xA1
R/W
Data direction register for port 1.
All ports on the chip are bi-directional. Each consists of a Latch (SFR USR70 to USR8), an output driver,
and an input buffer, therefore the MPU can output or read data through any of these ports if they are not
used for alternate purposes.
1.6 Instruction Set
All instructions of the generic 8051 microcontroller are supported. A complete list of the instruction set
and of the associated op-codes is contained in the 73S12xxF Software User’s Guide.
1.7 Peripheral Descriptions
1.7.1 Oscillator and Clock Generation
The 73S1215F has two oscillator circuits; one for the main CPU clock and another for the RTC. The
main oscillator circuit is designed to operate with various crystals or external clock frequencies. An
internal divider working in conjunction with a PLL and VCO needs to provide a 96MHz internal clock
within the 73S1215F. 96 MHz is the required frequency for proper operation of specific peripheral blocks
such as the USB, specific timers, ISO 7816 UART and interfaces and keypad. The clock generation and
control circuits are shown in Figure 3.
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