參數(shù)資料
型號(hào): 73S1209F-68IM/F/P
廠商: Maxim Integrated Products
文件頁數(shù): 89/123頁
文件大小: 0K
描述: IC SMART CARD READER PROG 68-QFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 260
系列: 73S12xx
核心處理器: 80515
芯體尺寸: 8-位
速度: 24MHz
連通性: I²C,智能卡,UART/USART
外圍設(shè)備: LED,POR,WDT
輸入/輸出數(shù): 9
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 68-VFQFN 裸露焊盤
包裝: 管件
73S1209F Data Sheet
DS_1209F_004
1.7.13 Smart Card Interface Function
The 73S1209F integrates one ISO-7816 (T=0, T=1) UART, one complete ICC electrical interface as well as an
external smart card interface to allow multiple smart cards to be connected using the Teridian 8010 family of interface
devices.
Figure 13 shows the simplified block diagram of the card circuitry (UART + interfaces), with detail of
dedicated XRAM registers.
circuitry (UART + interfaces), with detail of
dedicated XRAM registers.
Direct
Mode
Card
Insertion
Activation /
Deactivation
Sequencer
VCC
Buffer / Level
Shifter
RST
Buffer / Level
Shifter
CLK
I/O
Buffer / Level
Shifter
C4
Buffer / Level
Shifter
C8
Buffer / Level
Shifter
VCC Card
Generation
ICC Event
ICC Pwr_event
I/O ICC#1
I/
O
E
xt
.
IC
C
CLK ICC
CLKExt. ICC
Card Clock
Management
7.2MHz
SCCLK/
SCSCLK
PRES
Serial
UART
Internal ICC Interface
SCSel
UART
T=0 T=1
RLength
STSTO
ATRMsB/LsB
BGT/EGT
SRXData
SRXCtl
STXData
STXCtl
SCPrtcol
SCCtl
FDReg
SByteCtl
SParCtl
Card Interrupt
Management
SCInt
SCIE
External ICC Interface
Bypa
ss
Mode
XRAM Registers
VccCtl/
VccTMR
SCCLK/SCSCLK
Timers
2-Byte
Tx FIFO
2-Byte
Rx FIFO
Card and
Mode
Selection
TX
RX
SCDir
SCECtl
BGT0/1/2/3/
CWT0/1
SIO
SCLK
SCCLK
SCSCLK
Figure 13: Smart Card Interface Block Diagram
Card interrupts are managed through two dedicated registers SCIE (Interrupt Enable to define which
interrupt is enabled) and SCInt (Interrupt status). They allow the firmware to determine the source of an
interrupt, that can be a card insertion / removal, card power fault, or a transmission (TX) or reception (RX)
event / fault. It should be noted that even when card clock is disabled, an ICC interrupt can be generated
Card interrupts are managed through two dedicated registers SCIE (Interrupt Enable to define which
interrupt is enabled) and SCInt (Interrupt status). They allow the firmware to determine the source of an
interrupt, that can be a card insertion / removal, card power fault, or a transmission (TX) or reception (RX)
event / fault. It should be noted that even when card clock is disabled, an ICC interrupt can be generated
68
Rev. 1.2
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