參數(shù)資料
型號: 73M1822-IM/F
廠商: Maxim Integrated Products
文件頁數(shù): 70/82頁
文件大?。?/td> 0K
描述: MICRODAA VOICE DATA/FAX 42-QFN
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 260
系列: MicroDAA™
應用: 傳真,調制解調器,尋呼機
接口: 串行
電源電壓: *
封裝/外殼: 42-VFQFN 裸露焊盤
供應商設備封裝: 42-QFN(8x8)
包裝: 管件
安裝類型: 表面貼裝
73M1822/73M1922 Data Sheet
DS_1x22_017
72
Rev. 1.6
12.12 Line Status Functions Control Functions
These registers contain control information to set up and use the 73M1x22 line sensing functions.
Table 46: Line Sensing Control Functions
Function
Mnemonic
Register
Location
Type
Description
RXBST
0x14[3]
WO
Received Boost
If set to 1, Receive signal is increased by 20 dB. Default is 0. This is
used to amplify signals that are passed through the auxiliary A/D
when On-Hook.
CIDM
0x15[4]
W
Caller ID Mode
0 = Disable Caller ID Mode. (Default)
1 = Enables Caller ID Mode by coupling the signal from the
RGN/RGP pins to the receive filter input. A 20 dB gain boost is
included in the signal path. The RXBST bit should also be set to allow
the total nominal gain of 40 dB in the Caller ID path. The normal
signal path is disconnected.
Ring Detection Status Bits
RGTH
0x0E[1:0]
W
Ring Detect Threshold
Controls the Ring Detect Threshold assuming a 100:1 reduction of
Ring Voltage into RGP/RGN pins.
RGTH1
RGTH0
Description
0
Ring Detect disabled. For ring
detection to occur, these bits
must be programmed to a
non-zero state.
0
1
0.15 Vpk equivalent to ±15
Vpk at Auxiliary A/D input.
1
0
0.30 Vpk equivalent to ±30
Vpk at Auxiliary A/D input.
1
0.45 Vpk equivalent to ±45
Vpk at Auxiliary A/D input.
RGMON
0x03[3]
R
Ringing Monitor
Bit 3 monitors the activity of Ringing for further cadence check by the
host:
0 = Silent (Default)
1 = Ringing
This bit is not latched. This status bit is reset when read.
RGDT
0x03[0]
R
Ring or Line Reversal Detection
Voltage greater than the Ring Detect Threshold was detected at
RGP/RGN. This value is latched upon the event and cleared on read.
The threshold is determined by RGTH. This is a maskable interrupt.
It is enabled by the ENRGDT bit.
0 = No Latched Ring or Line Reversal Detection event. (Default)
1 = A Latched Ring or Line Reversal Detection event.
ENRGDT
0x05[0]
W
Enable Ring Detection Interrupt
This control bit enables the ring detection interrupt.
0 = Ring Detection Interrupt Disabled.
1 = Ring Detection Interrupt Enabled. (Default)
When 73M1922 detects an incoming ring signal, this bit will be set, if
enabled, and reset when read.
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