參數(shù)資料
型號: 73K322L-IH
廠商: TDK Corporation
英文描述: CCITT V.23, V.22, V.21 Single-Chip Modem
中文描述: 國際電話電報諮詢委員會.23,.22,.21單芯片調(diào)制解調(diào)器
文件頁數(shù): 9/30頁
文件大?。?/td> 288K
代理商: 73K322L-IH
73K322L
CCITT V.23, V.22, V.21
Single-Chip Modem
9
CONTROL REGISTER 0
D7
D6
D5
D4
D3
D2
D1
D0
CR0
000
MODUL.
OPTION
TRANSMIT
MODE 3
TRANSMIT
MODE 2
TRANSMIT
MODE 1
TRANSMIT
MODE 0
TRANSMIT
ENABLE
ANSWER/
ORIGINATE
BIT NO.
NAME
CONDITION
DESCRIPTION
D0
Answer/
Originate
0
Selects Answer mode in V.21 and V.22 (transmit in high
band), receive in low band or in V.23 HDX mode, receive
at 1200 bit/s and transmit at 75 bit/s.
Selects Originate mode in V.21 and V.22 (transmit in low
band), receive in high band or in V.23 HDX mode,
receive at 75 bit/s and transmit at 1200 bit/s.
1
Note: This bit works with TR bit D0 to program special
tones detected in Tone Register. See detect and tone
registers.
0
Disables transmit output at TXA.
Enables transmit output at TXA.
D1
Transmit Enable
1
Note: Answer tone and DTMF TX control require TX
enable.
D5 D4
D3 D2
0
0
0
0
Selects Power Down mode. All functions disabled except
digital interface.
0
0
0
1
Internal Synchronous mode. In this mode TXCLK is an
internally derived 1200 Hz signal. Serial input data
appearing at TXD must be valid on the rising edge of
TXCLK. Receive data is clocked out of RXD on the falling
edge of RXCLK.
0
0
1
0
External Synchronous mode. Operation is identical to
internal synchronous, but TXCLK is connected internally
to EXCLK pin, and a 1200 Hz ± 0.01% clock must be
supplied externally.
0
0
1
1
Slave Synchronous mode. Same operation as other
Synchronous modes. TXCLK is connected internally to
the RXCLK pin in this mode.
0
1
0
0
Selects DPSK Asynchronous mode - 8 bits/character (1
start bit, 6 data bits, 1 stop bit).
0
1
0
1
Selects DPSK Asynchronous mode - 9 bits/character (1
start bit, 7 data bits, 1 stop bit).
0
1
1
0
Selects DPSK Asynchronous mode - 10 bits/character (1
start bit, 8 data bits, 1 stop bit).
0
1
1
1
Selects DPSK Asynchronous mode - 11 bits/character (1
start bit, 8 data bits, Parity and 1 or 2 stop bits).
D5, D4,D3,
D2
Transmit Mode
1
1
0
0
Selects FSK operation.
相關(guān)PDF資料
PDF描述
73K322L-IP CCITT V.23, V.22, V.21 Single-Chip Modem
73K322L CCITT V.23, V.22, V.21 Single-Chip Modem(CCITT V.23, V.22, V.21單片Modem)
73M223 1200 Baud FSK Modem
73M223-CL 1200 Baud FSK Modem
73M223-CP 1200 Baud FSK Modem
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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