參數(shù)資料
型號: 72V3660L6PFG8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: FIFO
英文描述: 4K X 36 OTHER FIFO, 4 ns, PQFP128
封裝: GREEN, PLASTIC, TQFP-128
文件頁數(shù): 8/46頁
文件大?。?/td> 380K
代理商: 72V3660L6PFG8
16
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC IITM 36-BIT FIFO
1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36
APRIL 6, 2006
# of Bits Used:
10 bits for the IDT72V3640
11 bits for the IDT72V3650
12 bits for the IDT72V3660
13 bits for the IDT72V3670
14 bits for the IDT72V3680
15 bits for the IDT72V3690
Note: All unused bits of the
LSB & MSB are don't care
D/Q17
D/Q0
D/Q8
EMPTY OFFSET REGISTER (
PAE)
# of Bits Used
2
3
4
5
6
7
9
10
11
12
13
14
15
16
1st Parallel Offset Write/Read Cycle
2
3
4
5
6
7
8
12
13
14
15
16
17
11
Interspersed
Parity
17
10
1
8
D/Q35
D/Q19
9
D/Q17
D/Q0
D/Q8
FULL OFFSET REGISTER (
PAF)
# of Bits Used
2
3
4
5
6
7
9
10
11
12
13
14
15
16
2nd Parallel Offset Write/Read Cycle
2
3
4
5
6
7
8
12
13
14
15
16
17
11
Interspersed
Parity
17
10
1
8
9
IDT72V3640/50/60/70/80/90
x36 Bus Width
D/Q35
D/Q19
D/Q17
D/Q0
D/Q16
EMPTY OFFSET (LSB) REGISTER (
PAE)
Data Inputs/Outputs
# of Bits Used
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1st Parallel Offset Write/Read Cycle
Data Inputs/Outputs
2nd Parallel Offset Write/Read Cycle
1
2
3
4
5
6
7
8
10
11
12
13
14
15
9
FULL OFFSET (LSB) REGISTER (
PAF)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
10
11
12
13
14
15
9
Non-Interspersed
Parity
Interspersed
Parity
D/Q0
D/Q8
16
D/Q17
D/Q16
IDT72V3640/50/60/70/80/90
x18 Bus Width
4667 drw07
Non-Interspersed
Parity
Non-Interspersed
Parity
D/Q8
D/Q0
EMPTY OFFSET REGISTER (
PAE)
1
2
3
4
5
6
7
8
1st Parallel Offset Write/Read Cycle
2nd Parallel Offset Write/Read Cycle
D/Q8
D/Q0
EMPTY OFFSET REGISTER (
PAE)
9
10
11
12
13
14
15
16
3rd Parallel Offset Write/Read Cycle
D/Q8
D/Q0
FULL OFFSET REGISTER (
PAF)
1
2
3
4
5
6
7
8
4th Parallel Offset Write/Read Cycle
D/Q8
D/Q0
FULL OFFSET REGISTER (
PAF)
9
10
11
12
13
14
15
IDT72V3640/50/60/70/80/90
x9 Bus Width
Figure 3. Programmable Flag Offset Programming Sequence (Continued)
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72V3660L7-5BB 功能描述:先進先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
72V3660L7-5BB8 功能描述:先進先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
72V3660L7-5BBI 功能描述:先進先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
72V3660L7-5PF 功能描述:先進先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
72V3660L7-5PF8 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 4K X 36 128TQFP - Tape and Reel