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參數(shù)資料
| 型號(hào)： | 7204L20PDGB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | FIFO |
| 英文描述： | 4K X 9 OTHER FIFO, 20 ns, PDIP28 |
| 封裝： | GREEN, PLASTIC, DIP-28 |
| 文件頁(yè)數(shù)： | 11/14頁(yè) |
| 文件大?。?/td> | 114K |
| 代理商： | 7204L20PDGB |
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COMMERCIAL,INDUSTRIALANDMILITARY
TEMPERATURERANGES
IDT7203/7204/7205/7206/7207/7208 CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9, 8,192 x 9, 16,384 x 9, 32,768 x 9 and 65,536 x 9
OCTOBER 22, 2008
loaded(seeOperatingModes).TheSingleDeviceModeisinitiatedbygrounding
the Expansion In (
XI).
The IDT7203/7204/7205/7206/7207/7208 can be made to retransmit data
when the Retransmit Enable Control (
RT) input is pulsed LOW. A retransmit
operationwillsettheinternalreadpointertothefirstlocationandwillnotaffectthe
writepointer. ThestatusoftheFlagswillchangedependingontherelativelocations
of the read and write pointers. Read Enable (
R) and Write Enable (W) must be
intheHIGHstateduringretransmit. Thisfeatureisusefulwhenlessthan2,048/
4,096/8,192/16,384/32,768/65,536writesareperformedbetweenresets. The
retransmitfeatureisnotcompatiblewiththeDepthExpansionMode.
EXPANSION IN (
XI)—Thisinputisadual-purposepin. ExpansionIn(XI)
isgroundedtoindicateanoperationinthesingledevicemode. ExpansionIn(
XI)
isconnectedtoExpansionOut(
XO)ofthepreviousdeviceintheDepthExpansion
or Daisy-Chain Mode.
OUTPUTS:
FULL FLAG
( FF)—TheFullFlag(FF)willgoLOW,inhibitingfurtherwrite
operations,whenthedeviceisfull. IfthereadpointerisnotmovedafterReset(
RS),
the Full Flag (
FF) will go LOW after 2,048/4,096/8,192/16,384/32,768/65,536
writes.
EMPTY FLAG (
EF)—TheEmptyFlag(EF)willgoLOW,inhibitingfurther
readoperations,whenthereadpointerisequaltothewritepointer,indicatingthat
thedeviceisempty.
EXPANSIONOUT/HALF-FULLFLAG(
XO/HF)—Thisisadual-purpose
output. Inthesingledevicemode,whenExpansionIn(
XI)isgrounded,thisoutput
actsasanindicationofahalf-fullmemory.
Afterhalfofthememoryisfilled,andatthefallingedgeofthenextwriteoperation,
the Half-Full Flag (
HF)willbesettoLOWandwillremainsetuntilthedifference
betweenthewritepointerandreadpointerislessthanorequaltoonehalfofthe
totalmemoryofthedevice. TheHalf-FullFlag(
HF)isthenresetbytherisingedge
of the read operation.
IntheDepthExpansionMode,ExpansionIn(
XI)isconnectedtoExpansion
Out (
XO) of the previous device. This output acts as a signal to the next device
intheDaisyChainbyprovidingapulsetothenextdevicewhenthepreviousdevice
reaches the last location of memory. There will be an
XOpulsewhentheWrite
pointerreachesthelastlocationofmemory,andanadditional
XOpulsewhenthe
Readpointerreachesthelastlocationofmemory.
DATA OUTPUTS (Q0-Q8) — Q0-Q8 are data outputs for 9-bit wide data.
Theseoutputsareinahigh-impedanceconditionwheneverRead(
R)isinaHIGH
state.
SIGNAL DESCRIPTIONS
INPUTS:
DATA IN (D0–D8)
— Data inputs for 9-bit wide data.
CONTROLS:
RESET (
RS ) — Reset is accomplished whenever the Reset (RS) input is
takentoaLOWstate. Duringreset,bothinternalreadandwritepointersareset
tothefirstlocation.Aresetisrequiredafterpower-upbeforeawriteoperationcan
take place. Both the Read Enable (
R) and Write Enable (W) inputs must
be in the HIGH state during the window shown in Figure 2 (i.e. tRSS before
the rising edge of
RS) and should not change until tRSR after the rising
edge of
RS.
WRITE ENABLE (
W ) — A write cycle is initiated on the falling edge of this
inputiftheFullFlag(
FF)isnotset.Dataset-upandholdtimesmustbeadhered-
to,withrespecttotherisingedgeoftheWriteEnable(
W).DataisstoredintheRAM
array sequentially and independently of any on-going read operation.
Afterhalfofthememoryisfilled,andatthefallingedgeofthenextwriteoperation,
theHalf-FullFlag(
HF)willbesettoLOW,andwillremainsetuntilthedifference
betweenthewritepointerandreadpointerisless-thanorequaltoone-halfofthe
totalmemoryofthedevice.TheHalf-FullFlag(
HF)isthenresetbytherisingedge
of the read operation.
To prevent data overflow, the Full Flag (
FF)willgoLOWonthefallingedge
ofthelastwritesignal,whichinhibitsfurtherwriteoperations. Uponthecompletion
of a valid read operation, the Full Flag (
FF) will go HIGH after tRFF, allowing a
newvalidwritetobegin.WhentheFIFOisfull,theinternalwritepointerisblocked
from
W, so external changes inW will not affect the FIFO when it is full.
READENABLE(
R)—A readcycleisinitiatedonthefallingedgeoftheRead
Enable (
R), provided the Empty Flag (EF) is not set. The data is accessed on
aFirst-In/First-Outbasis,independentofanyongoingwriteoperations. AfterRead
Enable (
R) goes HIGH, the Data Outputs (Q0 through Q8) will return to a high-
impedanceconditionuntilthenextReadoperation. Whenallthedatahasbeen
read from the FIFO, the Empty Flag (
EF) will go LOW, allowing the “final” read
cyclebutinhibitingfurtherreadoperations,withthedataoutputsremaininginahigh-
impedancestate.Onceavalidwriteoperationhasbeenaccomplished,theEmpty
Flag (
EF) will go HIGH after tWEF and a valid Read can then begin. When the
FIFOisempty,theinternalreadpointerisblockedfrom
Rsoexternalchangeswill
not affect the FIFO when it is empty.
FIRST LOAD/RETRANSMIT (
FL/RT ) — This is a dual-purpose input. In
theDepthExpansionMode,thispinisgroundedtoindicatethatitisthefirstdevice
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| 7204L20SO | 功能描述:先進(jìn)先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲(chǔ)容量:4 Mbit 定時(shí)類型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪問時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
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