參數(shù)資料
型號(hào): 71V433S12PFI
廠商: Integrated Device Technology, Inc.
英文描述: 32K x 32 3.3V Synchronous SRAM Flow-Through Outputs
中文描述: 32K的× 32 3.3同步SRAM的流量通過輸出
文件頁(yè)數(shù): 16/19頁(yè)
文件大?。?/td> 261K
代理商: 71V433S12PFI
16
IDT71V433
32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Commercial and Industrial Temperature Ranges
Non-Burst Write Cycle Timing Waveform
NOTES:
1. ZZ input is LOW,
ADV
and
OE
are HIGH, and
LBO
is Don't Care for this cycle.
2. (Ax) represents the data for address Ax, etc.
3. Although only
GW
writes are shown, the functionality of
BWE
and
BW
x together is the same as
GW
.
4. For write cycles,
ADSP
and
ADSC
have different limtations.
CLK
ADSP
GW
CE
,
CS
1
CS
0
ADDRESS
ADSC
DATA
IN
Av
Aw
Ax
Az
Ay
(Av)
(Aw)
(Ax)
(Az)
(Ay)
3729 drw 12
.
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