參數(shù)資料
型號： 71M6541D-IGT/F
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 模擬信號調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PQFP64
封裝： LEAD FREE, LQFP-64
文件頁數(shù)： 165/165頁
文件大?。?/td> 2208K
代理商： 71M6541D-IGT/F
v1.1
2008–2011 Teridian Semiconductor Corporation
99
For VREF compensation, both the linear coefficient PPMC and the quadratic coefficient PPMC2, are
The compensation for the external error sources is accomplished by summing the PPMC value
associated with VREF with the PPMC value associated with the external error source to obtain the final
PPMC value for the sensor channel. Similarly, the PPMC2 value associated with VREF is summed with
the PPMC2 value associated with the external error source.
To determine the contribution of the current shunt sensor or CT to the PPMC and PPMC2 coefficients,
the designer must either know the temperature coefficients of the shunt or the CT from its data sheet or
obtain them by laboratory measurement. The designer must consider component variation across mass
production to ensure that the product will meet its accuracy requirement across production.
4.7.4
Temperature Compensation for VREF with Remote Sensor
This section discusses metrology temperature compensation for the meter designs where current shunt
sensors are used in conjunction with Teridian’s 71M6x01 isolated sensors, as shown in Figure 36 and
Any sensors that are directly connected to the 71M654x are affected by the voltage variation in the
71M654x VREF due to temperature. On the other hand, sensors that are connected to the 71M6x01
isolated sensor, are affected by the VREF in the 71M6x01. The VREF in both the 71M654x and
71M6x01 can be compensated digitally using a second-order polynomial function of temperature. The
71M654x and 71M6x01 feature temperature sensors for the purposes of temperature compensating their
corresponding VREF.
Referring to Figure 36 and Figure 38, the VA voltage sensor is available in both the 71M6541D/F and
71M6542F and is directly connected to the 71M654x. The VB voltage sensor is available only in the
71M6542F and is also directly connected to it. Thus, the precision of these directly connected voltage
sensors is affected by VREF in the 71M654x. The 71M654x also has one shunt current sensor (IA) which is
connected directly to it, and therefore is also affected by the VREF in the 71M654x. The external current
sensor and its corresponding signal conditioning circuit also has a temperature dependency, which
also may require compensation, depending on the required accuracy class. Finally, the second current
sensor (IB) is isolated by the 71M6x01 and depends on the VREF of the 71M6x01, plus the variation of the
corresponding shunt resistance with temperature.
The MPU has the responsibility of computing the necessary compensation values required for each sensor
channel based on the sensed temperature. Teridian provides demonstration code that implements the
GAIN_ADJn compensation equation shown below. The resulting GAIN_ADJn values are stored by the
MPU in three CE RAM locations GAIN_ADJ0-GAIN_ADJ2 (CE RAM 0x40-0x42). The demonstration code
thus provides a suitable implementation of temperature compensation, but other methods are possible in
MPU firmware by utilizing the on-chip temperature sensors and the CE RAM GAIN_ADJn storage locations.
The demonstration code maintains three separate sets of PPMC and PPMC2 coefficients and computes
three separate GAIN_ADJn values based on the sensed temperature using the equation below:
23
2
14
2
_
100
2
_
10
16385
_
PPMC
X
TEMP
PPMC
X
TEMP
ADJ
GAIN
+
+
=
Where, TEMP_X is the deviation from nominal or calibration temperature expressed in multiples of
0.1 °C. For example, since the 71M654x calibration (reference) temperature is 22
oC and the measured
temperature is 27
oC, then TEMP_X = (27-22) x 10 = 50 (decimal), which represents a +5 oC deviation
from 22
oC.
Table 73 shows the three GAIN_ADJn equation output values and the voltage or current measurements
for which they compensate.
GAIN_ADJ0 compensates for the VA and VB (71M6542F only) voltage measurements in the 71M654x
and is used to compensate the VREF in the 71M654x. The designer may optionally add
compensation for the resistive voltage dividers into the PPMC and PPMC2 coefficients for this
channel.
GAIN_ADJ1 provides compensation for the IA current channel and compensates for the 71M654x
VREF. The designer may optionally add compensation for the shunt and its corresponding signal
conditioning circuit into the PPMC and PPMC2 coefficients for this channel.
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