參數(shù)資料
型號： 71M6534H-IGTR/F
廠商： TERIDIAN SEMICONDUCTOR CORP
元件分類： 模擬信號調理
英文描述： SPECIALTY ANALOG CIRCUIT, PQFP120
封裝： LEAD FREE, LQFP-120
文件頁數(shù)： 24/124頁
文件大?。?/td> 2008K
代理商： 71M6534H-IGTR/F
71M6533/71M6534 Data Sheet
FDS_6533_6534_004
12
2007-2009 TERIDIAN Semiconductor Corporation
v1.1
Table 3: ADC RAM Locations
Signal Number
Address (HEX)
Name
0
0x00
IA
1
0x01
VA
2
0x02
IB
3
0x03
VB
4
0x04
IC
5
0x05
VC
6
0x06
ID
0x0A
TEMP
0x0B
VBAT
1.2.5
Voltage References
The device includes an on-chip precision bandgap voltage reference that incorporates auto-zero tech-
niques. The reference of the 71M6533H/71M6534H is trimmed in production to minimize errors caused
by component mismatch and drift. The result is a voltage output with a predictable temperature coeffi-
cient.
The amplifier within the reference is chopper stabilized, i.e. the polarity can be switched by the MPU us-
ing the I/O RAM register CHOP_E (0x2002[5:4]). The two bits in the CHOP_E register enable the MPU to
operate the chopper circuit in regular or inverted operation, or in toggling mode. When the chopper circuit
is toggled in between multiplexer cycles, DC offsets on the measured signals will automatically be aver-
aged out.
The general topology of a chopped amplifier is shown in Figure 2.
Figure 2: General Topology of a Chopped Amplifier
It is assumed that an offset voltage Voff appears at the positive amplifier input. With all switches, as con-
trolled by CROSS, in the A position, the output voltage is:
Voutp – Voutn = G (Vinp + Voff – Vinn) = G (Vinp – Vinn) + G Voff
With all switches set to the B position by applying the inverted CROSS signal, the output voltage is:
Voutn – Voutp = G (Vinn – Vinp + Voff) = G (Vinn – Vinp) + G Voff, or
Voutp – Voutn = G (Vinp – Vinn) - G Voff
Thus, when CROSS is toggled, e.g. after each multiplexer cycle, the offset will alternately appear on the
output as positive and negative, which results in the offset effectively being eliminated, regardless of its
polarity or magnitude.
When CROSS is high, the connection of the amplifier input devices is reversed. This preserves the over-
all polarity of that amplifier gain; it inverts its input offset. By alternately reversing the connection, the am-
plifier’s offset is averaged to zero. This removes the most significant long-term drift mechanism in the
G
-
+
V
inp
V
outp
V
outn
V
inn
CROSS
A
B
A
B
A
B
A
B
相關PDF資料
PDF描述
71M6533-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6534-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP120
71M6533-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6534H-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP120
71M6533H-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
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