參數(shù)資料
型號(hào): 71M6533H-IGTR/F
廠商: TERIDIAN SEMICONDUCTOR CORP
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP100
封裝: LEAD FREE, LQFP-100
文件頁(yè)數(shù): 30/124頁(yè)
文件大小: 2008K
代理商: 71M6533H-IGTR/F
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FDS_6533_6534_004
71M6533/71M6534 Data Sheet
v1.1
2007-2009 TERIDIAN Semiconductor Corporation
13
voltage reference. The CHOP_E bits control the behavior of CROSS. The CROSS signal will reverse the
amplifier connection in the voltage reference in order to negate the effects of its offset. On the first CK32
rising edge after the last multiplexer state of its sequence, the multiplexer will wait one additional CK32
cycle before beginning a new frame. At the beginning of this cycle, the value of CROSS will be updated
according to the CHOP_E bits. The extra CK32 cycle allows time for the chopped VREF to settle. During
this cycle, MUXSYNC is held high. The leading edge of MUXSYNC initiates a pass through the CE pro-
gram sequence. The beginning of the sequence is the serial readout of the four RTM words.
CHOP_E has four states: positive, reverse, and two toggle states. In the positive state, CHOP_E = 01,
CROSS and CHOP_CLK are held low. In the reverse state, CHOP_E = 10, CROSS and CHOP_CLK are
held high. In the first toggle state, CHOP_E = 00, CROSS is automatically toggled near the end of each
multiplexer frame and an ALT frame is forced during the last multiplexer frame in each SUM cycle. It is
desirable that CROSS take on alternate values during each ALT frame. For this reason, if CHOP_E = 00,
CROSS will not toggle at the end of the multiplexer frame immediately preceding the ALT frame in each
accumulation interval.
Figure 3: CROSS Signal with CHOP_E = 00
Figure 3 shows CROSS over two accumulation intervals when CHOP_E = 00: At the end of the first
interval, CROSS is low, at the end of the second interval, CROSS is high. The offset error for the
two temperature measurements taken during the ALT multiplexer frames will be averaged to zero.
Note that the number of multiplexer frames in an accumulation interval is always even. Operation
with CHOP_E = 00 does not require control of the chopping mechanism by the MPU while eliminating
the offset for temperature measurement.
In the second toggle state, CHOP_E = 11, no ALT frame is forced during the last multiplexer cycle in an
accumulation interval, and CROSS always toggles near the end of each multiplexer frame.
The internal bias voltage, VBIAS (typically 1.6 V), is used by the ADC as a reference when measuring the
temperature and battery monitor signals.
1.2.6
Temperature Sensor
The 71M6533 and 71M6534 include an on-chip temperature sensor implemented as a bandgap refer-
ence. It is used to determine the die temperature. The MPU may request an alternate multiplexer cycle
containing the temperature sensor output by asserting MUX_ALT.
The primary use of the temperature data is to determine the magnitude of compensation required to offset
the thermal drift in the system (see Section 3.5 Temperature Compensation).
1.2.7
Battery Monitor
The battery voltage is measured by the ADC during alternative multiplexer frames if the BME (Battery
Measure Enable) bit in the I/O RAM is set. While BME is set, an on-chip 45 k
load resistor is applied to
the battery and a scaled fraction of the battery voltage is applied to the ADC input. After each alternative
MUX frame, the result of the ADC conversion is available at XRAM address 0x07. BME is ignored and
assumed zero when system power is not available (V1 < VBIAS). See Section 5.4.5 Battery Monitor
for details regarding the ADC LSB size and the conversion accuracy.
1.2.8
AFE Functional Description
The AFE functions as a data acquisition system, controlled by the MPU. The main signals (IA, VA, IB,
VB, etc.) are sampled and the ADC counts obtained are stored in XRAM where they can be accessed by
Multiplexer frames
Accumulation interval n
Accumulation interval n+1
2
4
3
2519 2520
1
2
4
3
2519 2520
1
Alternative MUX cycle
Multiplexer frames
Alternative MUX cycle
CROSS
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