- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄68811 > 71M6531D-IMR/F (MAXIM INTEGRATED PRODUCTS INC) 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68 PDF資料下載
參數(shù)資料
| 型號(hào)： | 71M6531D-IMR/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68 |
| 封裝： | LEAD FREE, QFN-68 |
| 文件頁(yè)數(shù)： | 43/120頁(yè) |
| 文件大?。?/td> | 2477K |
| 代理商： | 71M6531D-IMR/F |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)當(dāng)前第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)
FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
v1.3
2005-2010 TERIDIAN Semiconductor Corporation
29
Table 21: Allowed Timer/Counter Mode Combinations
Timer 1
Mode 0
Mode 1
Mode 2
Timer 0 - mode 0
Yes
Timer 0 - mode 1
Yes
Timer 0 - mode 2
Not allowed
Yes
Table 22: TMOD Register Bit Description (SFR 0x89)
Bit
Symbol
Function
Timer/Counter 1:
TMOD[7]
Gate
If TMOD[7] is set, external input signal control is enabled for Counter 0.
external gate control. The TR1 bit in the TCON register (SFR 0x88) must
also be set in order for Counter 1 to increment.
With these settings Counter 1 is incremented on every falling edge of the
logic signal applied to one or more of the interrupt sources controlled by
the DI_RBP, DIO_R1, … DIO_RXX registers.
TMOD[6]
C/T
Selects timer or counter operation. When set to 1, a counter operation is
performed. When cleared to 0, the corresponding register will function as a
timer.
TMOD[5:4]
M1:M0
Selects the mode for Timer/Counter 1 as shown in Table 20.
Timer/Counter 0:
TMOD[3]
Gate
If TMOD[3] is set, external input signal control is enabled for Counter 0.
external gate control. The TR0 bit in the TCON register (SFR 0x88) must
also be set in order for Counter 0 to increment.
With these settings Counter 0 is incremented on every falling edge of the
logic signal applied to one or more of the interrupt sources controlled by
the DI_RBP, DIO_R1, … DIO_RXX registers.
TMOD[2]
C/T
Selects timer or counter operation. When set to 1, a counter operation is
performed. When cleared to 0, the corresponding register will function as
a timer.
TMOD[1:0]
M1:M0
Selects the mode for Timer/Counter 0, as shown in Table 20.
Table 23: The TCON Register Bit Functions (SFR 0x88)
Bit
Symbol
Function
TCON[7]
TF1
The Timer 1 overflow flag is set by hardware when Timer 1 overflows.
This flag can be cleared by software and is automatically cleared when an
interrupt is processed.
TCON[6]
TR1
Timer 1 run control bit. If cleared, Timer 1 stops.
TCON[5]
TF0
Timer 0 overflow flag set by hardware when Timer 0 overflows. This flag
can be cleared by software and is automatically cleared when an interrupt
is processed.
TCON[4]
TR0
Timer 0 Run control bit. If cleared, Timer 0 stops.
TCON[3]
IE1
Interrupt 1 edge flag is set by hardware when the falling edge on external
pin int1 is observed. Cleared when an interrupt is processed.
TCON[2]
IT1
Interrupt 1 type control bit. Selects either the falling edge or low level on
input pin to cause an interrupt.
TCON[1]
IE0
Interrupt 0 edge flag is set by hardware when the falling edge on external
pin int0 is observed. Cleared when an interrupt is processed.
TCON[0]
IT0
Interrupt 0 type control bit. Selects either the falling edge or low level on
input pin to cause interrupt.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 71M6532F-IGTR/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP100 |
| 71M6532D-IGT/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP100 |
| 71M6531D-IM/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68 |
| 71M6532F-IGTR/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP100 |
| 71M6534-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP120 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 71M6531F | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Energy Meter IC |
| 71M6531F-DB | 功能描述:開(kāi)發(fā)板和工具包 - 8051 71M6531F Demo Brd RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評(píng)估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: |
| 71M6531F-IM/F | 功能描述:計(jì)量片上系統(tǒng) - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6531F-IM/F3 | 功能描述:計(jì)量片上系統(tǒng) - SoC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6531F-IM/F4 | 功能描述:計(jì)量片上系統(tǒng) - SoC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。