參數(shù)資料
型號(hào)： 71M6513-IGT/F
廠(chǎng)商： MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi)： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PQFP100
封裝： LEAD FREE, LQFP-100
文件頁(yè)數(shù)： 64/104頁(yè)
文件大?。?/td> 1390K
代理商： 71M6513-IGT/F
71M6513/71M6513H
3-Phase Energy Meter IC
DATA SHEET
AUGUST 2011
Page: 62 of 104
2005-2011 Teridian Semiconductor Corporation
A Maxim Integrated Products Brand
Name
Location
[Bit(s)]
Dir
Description
DIO_0[7:0]
DIO_1[7:0]
DIO_2[5:0]
SFR 80
SFR 90
SFR
A0[5:0]
R/W
Port 0
Port 1
Port 2
The value on the DIO pins. Pins configured
as LCD will read zero. When written,
changes data on pins configured as out-
puts. Pins configured as LCD or input will
ignore writes.
DIO_EEX
2008[4]
R/W
When set, converts DIO4 and DIO5 to interface with external EEPROM.
DIO4 becomes SCK and DIO5 becomes bi-directional SDA. LCD_NUM
must be less than 18.
DIO_PV
2008[2]
R/W
Causes VARPULSE to be output on DIO7, if DIO7 is configured as output.
LCD_NUM must be less than 15.
DIO_PW
2008[3]
R/W
Causes WPULSE to be output on DIO6, if DIO6 is configured as output.
LCD_NUM must be less than 16.
EEDATA[7:0]
SFR 9E
R/W
Serial EEPROM interface data
EECTRL[7:0]
SFR 9F
R/W
Serial EEPROM interface control
ECK_DIS
2005[5]
R/W
Emulator clock disable. When one, the emulator clock is disabled. This bit
is to be used with caution! Inadvertently setting this bit will
inhibit access to the part with the ICE interface and thus
preclude flash erase and programming operations. If ECK_DIS
is set, it should be done at least 1000ms after power-up to give emulators
and programming devices enough time to complete an erase operation.
EQU[2:0]
2000[7:5]
R/W
Specifies the power equation to the CE.
EX_XFR
EX_RTC
2002[0]
2002[1]
R/W
Interrupt enable bits. These bits enable the XFER_BUSY and the
RTC_1SEC interrupts to the MPU. Note that if either interrupt is to be
enabled, EX6 in the 80515 must also be set.
FIR_LEN
2005[4]
R/W
The length of the ADC decimation FIR filter.
1: 22 ADC bits/3 CK32 cycles (384 CKFIR cycles),
0: 21 ADC bits/2 CK32 cycles (288 CKFIR cycles)
FLASH66Z
2005[1]
R/W
Should be set to 1 to minimize supply current.
FLSH_ERASE
SFR 94
W
Flash Erase Initiate
FLSH_ERASE is used to initiate either the Flash Mass Erase cycle or the
Flash Page Erase cycle. Specific patterns are expected for FLSH_ERASE in
order to initiate the appropriate Erase cycle.
(default = 0x00).
0x55 – Initiate Flash Page Erase cycle. Must be proceeded by a write to
FLSH_PGADR @ SFR 0xB7.
0xAA – Initiate Flash Mass Erase cycle. Must be proceeded by a write to
FLSH_MEEN @ SFR 0xB2 and the debug (CC) port must be
enabled.
Any other pattern written to FLSH_ERASE will have no effect.
FLSH_MEEN
SFR B2[1]
W
Mass Erase Enable
0 – Mass Erase disabled (default).
1 – Mass Erase enabled.
Must be re-written for each new Mass Erase cycle.
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71M6513-IGTR/F 功能描述:計(jì)量片上系統(tǒng) - SoC 3-Phase Energy Meter I/C RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類(lèi)型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類(lèi)型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel
71M6513-IGTR/F1 功能描述:計(jì)量片上系統(tǒng) - SoC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類(lèi)型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類(lèi)型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel
71M6515H 制造商:TERIDIAN 制造商全稱(chēng):TERIDIAN 功能描述:Energy Meter IC
71M6515H_11 制造商:TERIDIAN 制造商全稱(chēng):TERIDIAN 功能描述:Up to 10ppmC precision ultra-stable voltage reference Digital temperature compensation
71M6515H-DB 功能描述:開(kāi)發(fā)板和工具包 - 8051 71M6515H Demo Brd RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評(píng)估:C8051F960, Si7005 核心: 接口類(lèi)型:USB 工作電源電壓:
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