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參數(shù)資料
| 型號： | 7106L-R40-T |
| 廠商： | UNISONIC TECHNOLOGIES CO LTD |
| 元件分類： | ADC |
| 英文描述： | 1-CH PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO40 |
| 封裝： | LEAD FREE, SSOP-40 |
| 文件頁數(shù)： | 3/18頁 |
| 文件大小： | 438K |
| 代理商： | 7106L-R40-T |
7106
CMOS IC
UNISONICTECHNOLOGIESCO.,LTD
11 of 18
www.unisonic.com.tw
QW-R502-018.D
DETAILED DESCRIPTION(Cont.)
DIGITAL SECTION
Figure 5 show the digital section for the UTC 7106, respectively. In the UTC 7106, an internal digital ground is
generated from a 6V Zener diode and a large P-Channel source follower. This supply is made stiff to absorb the
relative large capacitive currents when the back plane(BP) voltage is switched. The BP frequency is the clock
frequency divided by 800. For three readings/sec, this is a 60Hz square wave with a nominal amplitude of 5V. The
segments are driven at the same frequency and amplitude and are in phase with BP when OFF, but out of phase
when ON. In all cases negligible DC voltage exists across the segments.
LCD PHASE DRIVER
7
SEGMENT
DECODE
7
SEGMENT
DECODE
7
SEGMENT
DECODE
LATCH
1000 s
COUNTER
,
100 s
COUNTER
,
10 s
COUNTER
,
1 s
COUNTER
,
BACKPLANE
÷200
LOGIC
CONTROL
÷ 4
FROM COMPARATOR OUTPUT
* THREE INVERTERS ONE INVERTER SHOWN FOR CLARITY
CLOCK
40
39
38
OSC 1
OSC 2
OSC 3
Figure 5. Digital Section
VTH=1V
26
37
6.2V
500
TEST
V-
V+
1
21
TYPICAL SEGMENT OUTPUT
SEGMENT
OUTPUT
2mA
0.5mA
V+
INTERNAL DIGITAL GROUND
INTERNAL
DIGITAL
GROUND
*
a
b
a
b
g
f
e
c
d
a
b
g
f
e
c
d
a
b
g
f
e
c
d
TO SWITCH DRIVERS
相關PDF資料 |
PDF描述 |
|---|---|
| 7106G-D40-T | 1-CH PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDIP40 |
| 7106L-R40-R | 1-CH PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO40 |
| 7106L-QM1-Y | 1-CH PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP44 |
| 7106G-R40-T | 1-CH PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO40 |
| 7170100205 | INTERCONNECTION DEVICE |
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