參數(shù)資料
型號: 7106G-D40-T
廠商: UNISONIC TECHNOLOGIES CO LTD
元件分類: ADC
英文描述: 1-CH PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDIP40
封裝: HALOGEN FREE, DIP-40
文件頁數(shù): 2/18頁
文件大小: 438K
代理商: 7106G-D40-T
7106
CMOS IC
UNISONICTECHNOLOGIESCO.,LTD
10 of 18
www.unisonic.com.tw
QW-R502-018.D
DETAILED DESCRIPTION(Cont.)
TEST
The TEST pin serves two function. On the UTC 7106 it is coupled to the internally generated digital supply through
a 500 resistor. Thus it can be used as the negative supply for externally generated segment drivers such as
decimal points or any other presentation the user may want to include on the LCD display. Figures 3 and 4 show
such an application. No more than a 1mA load should be applied.
The second function is a “l(fā)amp test”. When TEST is pulled high (to V+) all segments will be turned on and the
display should read ”1888”. The TEST pin will sink about 15mA under these conditions.
CAUTION: In the lamp test mode, the segments have a constant DC voltage (no square-wave) . This may burn the
LCD display if maintained for extended periods.
相關PDF資料
PDF描述
7106L-R40-R 1-CH PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO40
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