- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄157986 > 709279L9PF8 (INTEGRATED DEVICE TECHNOLOGY INC) 32K X 16 DUAL-PORT SRAM, 20 ns, PQFP100 PDF資料下載
參數(shù)資料
| 型號(hào)： | 709279L9PF8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 32K X 16 DUAL-PORT SRAM, 20 ns, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100 |
| 文件頁(yè)數(shù)： | 8/18頁(yè) |
| 文件大?。?/td> | 314K |
| 代理商： | 709279L9PF8 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)當(dāng)前第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)
6.42
IDT709279/69S/L
Preliminary
High-Speed 32/16K x 16 Synchronous Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
16
3243 drw 19
IDT709279/69
CE0
CE1
CE0
CE1
A15/A14(1)
CE1
CE0
VCC
IDT709279/69
Control Inputs
CNTRST
CLK
ADS
CNTEN
R/
W
OE
,
A Functional Description
The IDT709279/69 provides a true synchronous Dual-Port Static
RAM interface.Registeredinputsprovideminimalset-upandholdtimes
on address, data, and all critical control inputs. All internal registers are
clocked on the rising edge of the clock signal, however, the self-timed
internalwritepulseisindependentoftheLOWtoHIGHtransitionoftheclock
signal.
An asynchronous output enable is provided to ease asynchronous
bus interfacing. Counter enable inputs are also provided to stall the
operationoftheaddresscountersforfastinterleavedmemoryapplications.
AHIGHon CE0or a LOWon CE1foroneclockcyclewillpowerdown
the internal circuitry to reduce static power consumption. Multiple chip
enables allow easier banking of multiple IDT709279/69's for depth
expansionconfigurations.WhenthePipelinedoutputmodeisenabled,two
cycles are required with CE0 LOW and CE1 HIGH to re-activate the
outputs.
Depth and Width Expansion
The IDT709279/69 features dual chip enables (refer to Truth Table
I)inordertofacilitaterapidandsimpledepthexpansionwithnorequire-
mentsforexternallogic.Figure4illustrateshowtocontrolthevariouschip
enables in order to expand two devices in depth.
The IDT709279/69 can also be used in applications requiring ex-
panded width, as indicated in Figure 4. Since the banks are allocated at
thediscretionoftheuser,theexternalcontrollercanbesetuptodrivethe
input signals for the various devices as required to allow for 32-bit
orwiderapplications.
Figure 4. Depth and Width Expansion with IDT709279/69
NOTE:
1. A14 is for IDT709269.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT709279L12PFI8 | 32K X 16 DUAL-PORT SRAM, 25 ns, PQFP100 |
| 70C100BFIL | 110 A, SCR, TO-208AD |
| 70C100BIL | 110 A, SCR, TO-209AC |
| 70C120BFIL | 110 A, SCR, TO-208AD |
| 70C120BIL | 110 A, SCR, TO-209AC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 709279L9PFG | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 709279L9PFG8 | 功能描述:IC SRAM 512KBIT 100TQFP 制造商:idt, integrated device technology inc 系列:* 零件狀態(tài):初步 標(biāo)準(zhǔn)包裝:750 |
| 709279S12PF | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 709279S12PF8 | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 709279S12PFI | 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Sync Dual 5V 512K-Bit 32K x 16 25ns/12ns 100-Pin TQFP 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Sync Dual 5V 512K-Bit 32K x 16 25ns/12ns 100-Pin TQFP Tray 制造商:Integrated Device Technology Inc 功能描述:SRAM SYNC DUAL 5V 512KBIT 32KX16 25NS/12NS 100TQFP - Bulk |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。