參數(shù)資料
型號(hào)： 6LB176
廠商： Texas Instruments, Inc.
英文描述： DIFFERENTIAL BUS TRANSCEIVERS
中文描述： 差分總線收發(fā)器
文件頁(yè)數(shù)： 1/22頁(yè)
文件大小： 440K
代理商： 6LB176
SLLS067G AUGUST 1990 REVISED APRIL 2006
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Bidirectional Transceiver
Meets or Exceeds the Requirements of
ANSI Standard TIA/EIA485A and
ISO 8482:1987(E)
High-Speed Low-Power LinBiCMOS
Circuitry
Designed for High-Speed Operation in Both
Serial and Parallel Applications
Low Skew
Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments
Very Low Disabled Supply Current . . . 200
μ
A Maximum
Wide Positive and Negative Input/Output
Bus Voltage Ranges
Thermal-Shutdown Protection
Driver Positive-and Negative-Current
Limiting
Open-Circuit Failsafe Receiver Design
Receiver Input Sensitivity . . .
±
200 mV Max
Receiver Input Hysteresis . . . 50 mV Typ
Operates From a Single 5-V Supply
Glitch-Free Power-Up and Power-Down
Protection
Available in Q-Temp Automotive
HighRel Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
description
The
SN65LBC176Q, and SN75LBC176 differential
bus transceivers are monolithic, integrated
circuits designed for bidirectional data communi-
cation on multipoint bus-transmission lines. They
are designed for balanced transmission lines and
meet ANSI Standard TIA/EIA485A (RS-485)
and ISO 8482:1987(E).
SN55LBC176,
SN65LBC176,
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
R
RE
DE
D
V
CC
B
A
GND
D, JG, OR P PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
NC
B
NC
A
NC
NC
RE
NC
DE
NC
FK PACKAGE
(TOP VIEW)
N
R
N
G
N
C
N
N
D
N
NCNo internal connection
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Copyright
20002006, Texas Instruments Incorporated
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LinBiCMOS and LinASIC are trademarks of Texas Instruments Incorporated.
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INPUT
D
H
L
X
ENABLE
DE
H
H
L
OUTPUTS
A B
H L
L H
Z Z
DRIVER
DIFFERENTIAL INPUTS
VID = VIAVIB
VID
≥
0.2 V
0.2 V < VID < 0.2 V
VID
≤
0.2 V
X
Open
H = high level, L = low level, = indeterminate,
X = irrelevant, Z = high impedance (off)
ENABLE
RE
L
L
L
H
L
OUTPUT
R
H
L
Z
H
RECEIVER
Function Tables
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