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參數(shù)資料
| 型號(hào)： | 6A595 |
| 廠商： | Allegro MicroSystems, Inc. |
| 英文描述： | 8-BIT SERIAL-INPUT, DMOS POWER DRIVER |
| 中文描述： | 8位串行輸入，DMOS功率驅(qū)動(dòng) |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大小： | 176K |
| 代理商： | 6A595 |
D
2
8-BIT SERIAL-INPUT,
DMOS POWER DRIVER
The A6A595KA and A6A595KLB combine an 8-bit CMOS shift
register and accompanying data latches, control circuitry, and DMOS
power driver outputs. Power driver applications include relays, sole-
noids, and other medium-current or high-voltage peripheral power
loads.
The serial-data input, CMOS shift register and latches allow direct
interfacing with microprocessor-based systems. Serial-data input rates
are over 5 MHz. Use with TTL may require appropriate pull-up
resistors to ensure an input logic high.
A CMOS serial-data output enables cascade connections in appli-
cations requiring additional drive lines.
The A6A595 DMOS open-drain outputs are capable of sinking up
to 500 mA. All of the output drivers are disabled (the DMOS sink
drivers turned off) by the OUTPUT ENABLE input high.
The A6A595KA is furnished in a 20-pin dual in-line plastic
package. The A6A595KLB is furnished in a 24-lead wide-body, small-
outline plastic batwing package (SOIC) with gull-wing leads. Copper
lead frames, reduced supply current requirements, and low on-state
resistance allow both devices to sink 150 mA from all outputs continu-
ously, to ambient temperatures over 85
°
C.
FEATURES
I
50 V Minimum Output Clamp Voltage
I
350 mA Output Current (all outputs simultaneously)
I
1
Typical
r
DS(on)
I
Internal Short-Circuit Protection
I
Low Power Consumption
I
Replacements for TPIC6A595N and TPIC6A595DW
6A595
ADVANCE INFORMATION
(Subject to change without notice)
March 22, 2000
Always order by complete part number:
Part Number
A6A595KA
A6A595KLB
24-lead SOIC
Package
20-pin DIP
R
θ
JA
55
°
C/W
55
°
C/W
R
θ
JC
25
°
C/W
—
R
θ
JT
—
6
°
C/W
ABSOLUTE MAXIMUM RATINGS
at T
A
= 25
°
C
Output Voltage, V
O
...............................
50 V
Output Drain Current,
Continuous, I
O
..........................
350 mA
*
Peak, I
OM
.................................
1100 mA
Single-Pulse Avalanche Energy,
E
AS
.................................................
75 mJ
Logic Supply Voltage, V
DD
..................
7.0 V
Input Voltage Range,
V
I
...................................
-0.3 V to +7.0 V
Package Power Dissipation,
P
D
...........................................
See Graph
Operating Temperature Range,
T
A
.................................
-40
°
C to +125
°
C
Storage Temperature Range,
T
S
.................................
-55
°
C to +150
°
C
* Each output, all outputs on.
Pulse duration
≤
100
μ
s, duty cycle
≤
2%.
Caution: These CMOS devices have input static
protection (Class 3) but are still susceptible to
damage if exposed to extremely high static
electrical charges.
LATCHES
REGISTER
SERIAL
DATA IN
REGISTER
CLEAR
OUT
3
V
DD
STROBE
CLOCK
CLK
ST
Dwg. PP-029-15
OUT
2
OUTPUT
ENABLE
OE
LOGIC
GROUND
CLR
13
14
15
16
17
19
12
18
20
11
1
2
3
8
9
4
5
6
7
10
POWER
GROUND
POWER
GROUND
POWER
GROUND
POWER
GROUND
OUT
5
OUT
4
OUT
6
OUT
7
OUT
1
OUT
0
SERIAL
DATA OUT
LOGIC
SUPPLY
REGISTER
LATCHES
A6A595KA (DIP)
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