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參數(shù)資料
| 型號： | 68HC68W1 |
| 廠商： | Intersil Corporation |
| 英文描述： | CMOS Serial Digital Pulse Width Modulator |
| 中文描述： | 的CMOS串行數(shù)字脈寬調制器 |
| 文件頁數(shù)： | 2/9頁 |
| 文件大?。?/td> | 43K |
| 代理商： | 68HC68W1 |
2
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage Range, (V
DD
) . . . . . . . . . . . . . . . . -0.5V to +7V
(Voltage Referenced to V
SS
Terminal)
Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to V
DD
+0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . . .±
10mA
Operating Conditions
Temperature Range (T
A
) . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
T
A
= Full Package Temperature Range (All Package Types)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Resistance (Typical, Note 1)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Device Dissipation Per Output Transistor . . . . . . . . . . . . . . . 100mW
Maximum Storage Temperature Range (T
STG
) . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (During Soldering) . . . . . . . . . . 265
o
C
At Distance 1/16
±
1/32 in. (1.59
±
0.79mm)
From Case for 10s Max
θ
JA
(
o
C/W)
99
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
CDP68HC68W1,
V
DD
= 5V
±
10%, V
SS
= 0V, T
A
= -40
o
C to 85
o
C
DC Operating Voltage Range
-
4
-
6
V
Input Voltage Range (Except V
T
Pin)
V
IH
0.7V
DD
-
V
DD
+0.3V
V
V
IL
-0.3
-
0.3V
DD
V
V
T
Pin Output Voltage Threshold
V
IT
0.4
-
0.15V
DD
V
Device Current in “Power Down” Mode, Clock Disabled
I
PD
-
-
1
μ
A
Low Level Output Voltage (I
OL
= 1.6mA)
V
OL
-
-
0.4
V
High Level Output Voltage (I
OH
= -1.6mA)
V
OH
V
DD
- 0.4V
-
-
V
Input Leakage Current
I
IN
-
-
±
1
μ
A
Operating Device Current (f
CLK
= 1MHz)
I
OPER
-
-
1
mA
Clock Input Capacitance
(V
IN
= 0V, f
CLK
= 1MHz, T
A
= 25
o
C)
C
IN
-
-
10
pF
Control Timing
PARAMETER
SYMBOL
MIN
MAX
UNITS
CDP68HC68W1,
V
DD
= 5V
±
10%, V
SS
= 0V, T
A
= -40
o
C to 85
o
C
Clock Frequency
F
CLK
DC
8.0
MHz
Cycle Time
t
CYC
-
-
ns
Clock to PWM Out
t
PWMO
-
125
ns
Clock High Time
t
CLKH
50
-
ns
Clock Low Time
t
CLKL
50
-
ns
Rise Time (20% V
DD
to 70% V
DD
)
t
R
-
100
ns
Fall Time (70% V
DD
to 20% V
DD
)
t
F
-
100
ns
CDP68HC68W1
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