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參數(shù)資料
| 型號： | 5V2528APGI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 5V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | TSSOP-28 |
| 文件頁數(shù)： | 4/7頁 |
| 文件大小： | 333K |
| 代理商： | 5V2528APGI |
4
INDUSTRIALTEMPERATURERANGE
IDT5V2528/A
2.5 / 3.3V PHASE-LOCK LOOP CLOCK DRIVER
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Symbol
Parameter
Test Conditions
Min.
Typ.(1)
Max
Unit
VIK
Input Clamp Voltage
II = -18mA
- 1.2
V
VIH
Input HIGH Level
CLK, FBIN
2
V
VIL
Input LOW Level
CLK, FBIN
0.8
V
VIHH
Input HIGH Voltage Level(2)
3-Level Inputs Only
VDD - 0.6
V
VIMM
Input MID Voltage Level(2)
3-Level Inputs Only
VDD/2 - 0.3
VDD/2 + 0.3
V
VILL
Input LOW Voltage Level(2)
3-Level Inputs Only
0.6
V
VOH
Output HIGH Voltage Level
IOH = -100
μAVDD - 0.2
V
(3.3V Outputs)
IOH = -12mA
2.4
VOH
Output HIGH Voltage Level
IOH = -100
μAVDD - 0.1
(2.5V Outputs)
IOH = -12mA
2
V
VOL
Output LOW Voltage Level
IOL = 100
μA
0.2
V
(3.3V Outputs)
IOL = 12mA
0.4
VOL
Output LOW Voltage Level
IOL = 100
μA
0.1
V
(2.5V Outputs)
IOL = 12mA
0.4
I3
3-Level Input DC Current
VIN = VDD
HIGH Level
+200
(G_Ctrl, T_Ctrl)
VIN = VDD/2
MID Level
–50
+50
μA
VIN = GND
LOW Level
–200
II
InputCurrent
VI = VDD or GND
±5
μA
NOTES:
1. For conditions shown as Min or Max, use the appropriate value specified under recommended operating conditions.
2. These inputs are normally wired to VDD, GND, or left floating. Internal termination resistors bias floating inputs to VDD/2. If these inputs are switched, the function and timing of
the outputs may be glitched, and the PLL may require an additional tLOCK time before all datasheet limits are achieved.
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions
Typ.(1)
Max
Unit
IDDPD
Power Down Supply Current
VDD = 3.6, VDDQ = 2.7V / 3.3V, AVDD = 0V
8
40
μA
IDDA
AVDD Supply Current
VDD = AVDD = 3.6V, VDDQ = 2.7V / 3.3V, CLK = 0 or VDD
3.5
10
mA
IDD
Dynamic Power Supply Current
VDD = AVDD = 3.6V, VDDQ = 2.7V / 3.3V, CL = 0pF
500
—
μA/MHz
VDD = AVDD = VDDQ = 3.6V
15
—
IDDD
Dynamic Power Supply
CL = 30pF, CLK = 100MHz
mA
CurrentperOutput
VDD = AVDD = 3.6V, VDDQ = 2.7V
12
—
CL = 20pF, CLK = 100MHz
NOTE:
1. For nominal voltage and temperature.
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| 5V2528PGGI | 功能描述:時(shí)鐘驅(qū)動器及分配 2.5/3.3V PLL Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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