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參數(shù)資料
| 型號： | 5962R9675501V9X |
| 廠商： | INTERSIL CORP |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 12-BIT DAC, UUC24 |
| 封裝： | DIE-24 |
| 文件頁數(shù)： | 7/7頁 |
| 文件大?。?/td> | 125K |
| 代理商： | 5962R9675501V9X |
7
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certication.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Die Characteristics
DIE DIMENSIONS:
179 mils x 107 mils x 19 mils
INTERFACE MATERIALS:
Glassivation:
Type: AlCu
Thickness: 8k
±1k
Top Metallization:
Type: Al/Copper
Thickness: 16k
±2k
Substrate:
Bipolar DI,
Backside Finish:
Silicon
ASSEMBLY RELATED INFORMATION
Substrate Potential:
Tie Substrate to VREF GND
ADDITIONAL INFORMATION:
Worst Case Current Density:
2.0 x 105 A/cm2
Transistor Count:
200
Metallization Mask Layout
HS-565ARH
VCC
(MSB)
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
(LSB)
POWER
GND
20V
SPAN
10V
SPAN
IDAC
OUT
BIPOLAR
12
-VS
VREF IN
VREF
GND
VREF OUT
3
NC
3
NC
1
A
HS-565ARH
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| 5962R9675501VXX | PARALLEL, WORD INPUT LOADING, 0.35 us SETTLING TIME, 12-BIT DAC, CDFP24 |
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| 5962R9675501VJX | PARALLEL, WORD INPUT LOADING, 0.35 us SETTLING TIME, 12-BIT DAC, CDIP24 |
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