參數(shù)資料
型號(hào): 5962L005366VYC
元件分類: SRAM
英文描述: 512K X 8 STANDARD SRAM, 20 ns, CDFP36
封裝: CERAMIC, DFP-36
文件頁(yè)數(shù): 14/16頁(yè)
文件大?。?/td> 138K
代理商: 5962L005366VYC
7
Assumptions:
1. E and G < VIL (max) and W > VIH (min)
A(18:0)
DQ(7:0)
Figure 4a. SRAM Read Cycle 1: Address Access
tAVAV
tAVQV
tAXQX
Previous Valid Data
Valid Data
Assumptions:
1. G < VIL (max) and W > VIH (min)
A(18:0)
Fi
4b SRAM Rd Cl 2 Chi E
bl C
ll d A
E
DATA VALID
tEFQZ
tETQV
tETQX
DQ(7:0)
Figure 4b. SRAM Read Cycle 2: Chip Enable-Controlled Access
Figure 4c. SRAM Read Cycle 3: Output Enable-Controlled Access
A(18:0)
DQ(7:0)
G
tGHQZ
Assumptions:
1. E< VIL (max) and W > VIH (min)
tGLQV
tGLQX
tAVQV
DATA VALID
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