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參數(shù)資料
| 型號： | 5962L005365VYA |
| 元件分類： | SRAM |
| 英文描述： | 512K X 8 STANDARD SRAM, 20 ns, CDFP36 |
| 封裝： | CERAMIC, DFP-36 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 138K |
| 代理商： | 5962L005365VYA |
5
DC ELECTRICAL CHARACTERISTICS (Pre/Post-Radiation)*
-55
°C to +125°C for (C) screening and -40oC to +125oC for (W) screening (V
DD = 5.0V + 10%)
Notes:
* Post-radiation performance guaranteed at 25
°C per MIL-STD-883 Method 1019.
1. Measured only for initial qualification and after process or design changes that could affect input/output capacitance.
2. Supplied as a design limit but not guaranteed or tested.
3. Not more than one output may be shorted at a time for maximum duration of one second.
4. G = V1H
SYMBOL
PARAMETER
CONDITION
MIN
MAX
UNIT
VIH
High-level input voltage
(TTL)
2
V
VIL
Low-level input voltage
(TTL)
0.8
V
VOL1
Low-level output voltage
IOL = 8mA, VDD =4.5V (TTL)
0.4
V
VOL2
Low-level output voltage
IOL = 200μA,VDD =4.5V (CMOS)
0.05
V
VOH1
High-level output voltage
IOH = -4mA,VDD =4.5V (TTL)
2.4
V
VOH2
High-level output voltage
IOH = -200μA,VDD =4.5V (CMOS)
3.2
V
CIN
1
Input capacitance
= 1MHz @ 0V
10
pF
CIO
1
Bidirectional I/O capacitance
= 1MHz @ 0V
12
pF
IIN
Input leakage current
VIN = VDD and VSS, VDD = VDD (max)
-2
2
μA
IOZ
Three-state output leakage current
VO = VDD and VSS
VDD = VDD (max)
G = VDD (max)
-2
2
μA
IOS
2, 3
Short-circuit output current
VDD = VDD (max), VO = VDD
VDD = VDD (max), VO = 0V
-90
90
mA
IDD(OP)
4
Supply current operating
@ 1MHz
Inputs: VIL = 0.8V,
VIH = 2.0V
IOUT = 0mA
VDD = VDD (max)
50
mA
IDD(OP)
4
Supply current operating
@50MHz
Inputs: VIL = 0.8V,
VIH = 2.0V
IOUT = 0mA
VDD = VDD (max)
76
mA
IDD(SB)
Supply current standby
@0MHz
Inputs: VIL = VSS
IOUT = 0mA
E = VDD - 0.5
VDD = VDD (max)
VIH = VDD - 0.5V
10
45
mA
-55
°C, -40°C, 25°C
125
°C
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